公开(公告)号：US20070139538A1

公开(公告)日：2007-06-21

申请号：US11545342

申请日：2006-10-10

申请人： Suk-Beom Song ,  Jae-Hoon Seo

发明人： Suk-Beom Song ,  Jae-Hoon Seo

IPC分类号： H04N9/64

CPC分类号： H04N5/142 ,  H04N9/646

摘要： An apparatus for processing a digital image signal includes a pseudo-luminance generator configured to generate pseudo-luminance signals from the image signal. An edge detector detects an edge in the image signal using a part of an interpolated image signal as a luminance signal for a line of the image signal including a pixel subjected to edge detection and using the pseudo-luminance signals for adjacent lines. A color suppressor suppresses pseudo-color present in the chrominance component of the image signal in response to a detected edge. A compensator may be provided to generate a second edge metric relative to the image signal to compensate for an edge detection error occurring in the edge detector. A color suppression coefficient calculator to generate a color suppression coefficient using a first edge metric generated by the edge detector and the second edge metric. Corresponding systems and methods are disclosed.

摘要翻译： 一种用于处理数字图像信号的装置包括被配置为从该图像信号产生伪亮度信号的伪亮度发生器。 边缘检测器使用内插图像信号的一部分来检测图像信号中的边缘，作为包括经受边缘检测的像素的图像信号的线的亮度信号，并且使用相邻线的伪亮度信号。 彩色抑制器响应于检测到的边缘抑制图像信号的色度分量中存在的伪色。 可以提供补偿器来产生相对于图像信号的第二边缘度量，以补偿边缘检测器中出现的边缘检测误差。 一种颜色抑制系数计算器，用于利用由边缘检测器产生的第一边缘度量和第二边缘度量来产生色彩抑制系数。 公开了相应的系统和方法。

公开(公告)号：US07142252B2

公开(公告)日：2006-11-28

申请号：US10044123

申请日：2002-01-10

申请人： Suk-beom Song

发明人： Suk-beom Song

IPC分类号： H04N5/46 ,  H04N5/45

CPC分类号： H04N5/45 ,  H04N21/4305 ,  H04N21/4316 ,  H04N21/440281

摘要： An apparatus and method for implementing picture-in-picture with frame rate conversion includes an input buffer unit, a data synchronizing unit, first through third memories, and a memory control unit. The input buffer unit buffers input data and outputs buffered data as first data and first data enabling signals. The data synchronizing unit synchronizes the first data output with an output clock signal and outputs synchronized data as second data and second data enabling signals. The first memory multiplexes the second data and outputs stored data in response to a first memory enabling signal. The second memory writes and reads data output from the first memory in response to a frame buffer control signal. The third memory outputs stored data as a display signal. The memory control unit controls data flow between the memories and frame rates of the input data.

摘要翻译： 用于实现具有帧速率转换的画中画的装置和方法包括输入缓冲器单元，数据同步单元，第一至第三存储器和存储器控制单元。 输入缓冲器单元缓冲输入数据并输出缓冲数据作为第一数据和第一数据使能信号。 数据同步单元将第一数据输出与输出时钟信号同步，并将作为第二数据和第二数据使能信号的同步数据输出。 第一存储器复用第二数据并响应于第一存储器使能信号输出存储的数据。 第二存储器响应于帧缓冲器控制信号写入和读取从第一存储器输出的数据。 第三存储器将存储的数据作为显示信号输出。 存储器控制单元控制存储器之间的数据流和输入数据的帧速率。

公开(公告)号：US07649557B2

公开(公告)日：2010-01-19

申请号：US11545342

申请日：2006-10-10

申请人： Suk-Beom Song ,  Jae-Hoon Seo

发明人： Suk-Beom Song ,  Jae-Hoon Seo

IPC分类号： H04N5/208 ,  H04N9/64 ,  G06K9/48 ,  G06K9/40 ,  H04N1/46

CPC分类号： H04N5/142 ,  H04N9/646

摘要： An apparatus for processing a digital image signal includes a pseudo-luminance generator configured to generate pseudo-luminance signals from the image signal. An edge detector detects an edge in the image signal using a part of an interpolated image signal as a luminance signal for a line of the image signal including a pixel subjected to edge detection and using the pseudo-luminance signals for adjacent lines. A color suppressor suppresses pseudo-color present in the chrominance component of the image signal in response to a detected edge. A compensator may be provided to generate a second edge metric relative to the image signal to compensate for an edge detection error occurring in the edge detector. A color suppression coefficient calculator to generate a color suppression coefficient using a first edge metric generated by the edge detector and the second edge metric. Corresponding systems and methods are disclosed.

摘要翻译： 一种用于处理数字图像信号的装置包括被配置为从该图像信号产生伪亮度信号的伪亮度发生器。 边缘检测器使用内插图像信号的一部分来检测图像信号中的边缘，作为包括经受边缘检测的像素的图像信号的行的亮度信号，并且使用相邻行的伪亮度信号。 彩色抑制器响应于检测到的边缘抑制图像信号的色度分量中存在的伪色。 可以提供补偿器来产生相对于图像信号的第二边缘度量，以补偿边缘检测器中出现的边缘检测误差。 一种颜色抑制系数计算器，用于利用由边缘检测器产生的第一边缘度量和第二边缘度量来产生色彩抑制系数。 公开了相应的系统和方法。

公开(公告)号：US07126643B2

公开(公告)日：2006-10-24

申请号：US10743633

申请日：2003-12-22

申请人： Suk-beom Song ,  Yong-in Han ,  Chang-won Huh ,  Hyen-aee Woo

发明人： Suk-beom Song ,  Yong-in Han ,  Chang-won Huh ,  Hyen-aee Woo

IPC分类号： H04N7/01

CPC分类号： H04N7/012 ,  H04N5/142 ,  H04N7/0142

摘要： Provided is a progressive scan method used in a display using adaptive edge interpolation. According to the progressive scan method, a final edge direction that satisfies a first edge-determination condition and a second edge-determination condition is detected by performing interpolation for 7×3 pixel windows, using code determination and a comparison of a standard deviation based on differences between luminances of pixel data divided by an edge boundary. As a result, directional edge interpolation is carried out in a region of a low gradient below 45° and to 27° at the minimum, and simple intra-field linear interpolation can be performed in a high-frequency texture region. Subsequently, it is possible to remove high-frequency noise introduced in edge dependent interpolation or unnatural screen display due to zigzagged edges, thereby improving the quality of a display.

摘要翻译： 提供了一种使用自适应边缘插值的显示中使用的逐行扫描方法。 根据逐行扫描方法，通过对7×3像素窗进行插值来检测满足第一边缘确定条件和第二边缘确定条件的最终边缘方向，使用代码确定和基于基于 像素数据的亮度除以边缘边界。 结果，方向边缘内插是在低至45°和最低27°的低梯度的区域中进行的，并且可以在高频纹理区域中执行简单的场内线性插值。 随后，可以消除由于锯齿形边缘引起的边缘相关内插或不自然屏幕显示引入的高频噪声，从而提高显示质量。

公开(公告)号：US07116373B2

公开(公告)日：2006-10-03

申请号：US10705450

申请日：2003-11-10

申请人： Suk-beom Song ,  Byeung-woo Jeon

发明人： Suk-beom Song ,  Byeung-woo Jeon

IPC分类号： H04N11/20

CPC分类号： H04N7/012

摘要： Deinterlacing apparatus and method capable of outputting two consecutive deinterlaced frames include a field buffer, a shift buffer, a frame generator, and a line exchanger. The field buffer receives and stores a plurality of consecutive interlaced fields, and then outputs, in response to a control signal, p-th interlaced line data of an m-th field, p-th interlaced line data of an (m+2)-th field, p-th interlaced line data of an (m+1)-th field, and (p+1)-th interlaced line data of the (m+1)-th field in series or the p-th interlaced line data of the (m+1)-th field, p-th interlaced line data of an (m+3)-th field, the p-th interlaced line data of the (m+2)-th field, and (p+1)-th interlaced line data of the (m+2)-th field in series. The shift buffer which receives signals output from the field buffer in series, converts the signals into parallel signals, and outputs first through fourth line data in parallel. The frame generator which receives the first through fourth line data from the shift buffer, senses motion in the first through fourth line data between fields, and selectively outputs the result of temporally filtering adjacent line data or the result of spatially filtering adjacent line data in response to the result of the motion sensing. The line exchanger receives the first line data of the shift buffer and an output signal of the frame generator and selectively exchanges the first line data with line data of the output signal of the frame generator in response to a line exchange signal.

摘要翻译： 能够输出两个连续去隔行帧的去隔行扫描装置和方法包括场缓冲器，移位缓冲器，帧发生器和线路交换器。 场缓冲器接收并存储多个连续的隔行扫描场，然后响应于控制信号输出第（m + 2）个第m场的第p个隔行数据， 第（m + 1）场和第（m + 1）场的第（p + 1）隔行数据串联或第p隔行 第（m + 1）场的第（m + 1）场，第（m + 3）场的第p个隔行线数据，（m + 2）场的第p个隔行线数据和（ p + 1）第（m + 2）场的交错行数据。 串行从场缓冲器输出的信号的移位缓冲器将信号转换为并行信号，并且并行输出第一至第四行数据。 接收来自移位缓冲器的第一至第四行数据的帧生成器感测场之间的第一至第四行数据中的运动，并且选择性地输出相邻行数据的时间滤波结果或相应行数据的空间滤波结果 对运动感测的结果。 线路交换机接收移位缓冲器的第一行数据和帧发生器的输出信号，并且响应于行交换信号，选择性地将第一行数据与帧生成器的输出信号的行数据交换。

公开(公告)号：US20070036022A1

公开(公告)日：2007-02-15

申请号：US11502036

申请日：2006-08-10

申请人： Suk-Beom Song

发明人： Suk-Beom Song

IPC分类号： G11C8/00

CPC分类号： G06F5/14 ,  G11C7/103 ,  G11C19/285

摘要： In a synchronizer for multi-rate input data, a unified FIFO (first-in-first-out) memory receives multi-rate input data, converts the multi-rate input data into a single system operation frequency, and outputs converted data of a plurality of channels of the multi-rate input data, based on the control of a controller.

摘要翻译： 在用于多速率输入数据的同步器中，统一的FIFO（先进先出）存储器接收多速率输入数据，将多速率输入数据转换为单个系统操作频率，并输出转换后的数据 基于控制器的控制，多速率输入数据的多个通道。