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公开(公告)号:US06173900B1
公开(公告)日:2001-01-16
申请号:US09427596
申请日:1999-10-27
申请人: Hiroshi Yoshigi , Takehiro Ookawa , Ryouzou Yoshino , Kimiaki Andou , Tadashi Oonishi , Koji Tsuru , Shin Kanno , Shigeru Date , Hisanobu Dobashi , Masahiro Sugiura
发明人: Hiroshi Yoshigi , Takehiro Ookawa , Ryouzou Yoshino , Kimiaki Andou , Tadashi Oonishi , Koji Tsuru , Shin Kanno , Shigeru Date , Hisanobu Dobashi , Masahiro Sugiura
IPC分类号: G06V19067
CPC分类号: G06K19/07779 , G06K19/07749 , G06K19/07796
摘要: An object of the present invention is able to provide an IC card in which for example, even if a state should occur in which a plurality of IC cards are piled up in any direction for use, a received signal is not greatly lowered but a normal usage pattern is secured. When the IC cards are piled up with the contours united, a projection drawing of an antenna of one IC card to an antenna surface of the other IC card has an area not overlapped at least 15% or more of an area having an antenna to the other antenna surface on the projection surface and the IC card can work.
摘要翻译: 本发明的目的是提供一种IC卡,其中例如即使在任何方向上堆积多个IC卡的情况下,接收信号也不会大大降低,而是正常 使用模式得到保护。当IC卡堆叠在一起时,将IC卡的天线投影到另一IC卡的天线表面,其面积不重叠至少15%以上的区域 具有到投影表面上的另一个天线表面的天线,并且IC卡可以工作。
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公开(公告)号:US20100046256A1
公开(公告)日:2010-02-25
申请号:US12090697
申请日:2006-10-19
申请人: Shin Kanno , Mitsuo Hattori , Mamoru Sato , Kenji Iguchi
发明人: Shin Kanno , Mitsuo Hattori , Mamoru Sato , Kenji Iguchi
IPC分类号: H02M1/36
CPC分类号: H02M7/125 , Y10T307/625
摘要: An output node at a plus side of a diode bridge (DB2) is connected to a drain of a transistor (Q1), and a source of the transistor (Q1) is connected to an output node at a minus side the diode bridge (DB2). One end of a resister (R1) is connected to the drain of the transistor (Q1), and the other end of the resister (R1) is connected to a gate of the transistor (Q1). One end of a resister (R2) is connected to the gate of the transistor (Q1), and the other end of the resister (R2) is connected to the source of the transistor (Q1). A capacitor (C1) is connected in parallel to the resister (R2).
摘要翻译: 二极管桥(DB2)的正面的输出节点连接到晶体管(Q1)的漏极,晶体管(Q1)的源极连接到二极管桥(DB2)的负侧的输出节点 )。 电阻器(R1)的一端连接到晶体管(Q1)的漏极,并且电阻(R1)的另一端连接到晶体管(Q1)的栅极。 电阻器(R2)的一端连接到晶体管(Q1)的栅极,并且电阻(R2)的另一端连接到晶体管(Q1)的源极。 电容器(C1)与电阻器(R2)并联连接。
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公开(公告)号:US5379293A
公开(公告)日:1995-01-03
申请号:US40142
申请日:1993-03-29
CPC分类号: H04L12/6418 , H04L2012/6429 , H04L2012/6481
摘要: A small and economical voice packet assembling/disassembling (PAD) apparatus, which includes only one packet assembler/disassembler for a plurality of channels. The packet assembler receives coded voice data from a plurality of CODECs provided for each channel, and assembles voice packets by using the coded voice data. The packet disassembler disassembles voice packets to coded voice data and supplies them to a plurality of CODECs provided for each channel.
摘要翻译: 一种小而经济的语音分组组合/分解(PAD)装置,其仅包括用于多个信道的一个分组组装/分解器。 分组汇编器从为每个信道提供的多个CODEC接收编码的语音数据,并通过使用编码的语音数据来组装语音分组。 分组分解器将语音分组拆分为编码的语音数据,并将它们提供给为每个频道提供的多个编解码器。
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公开(公告)号:US5249185A
公开(公告)日:1993-09-28
申请号:US740431
申请日:1991-08-05
CPC分类号: H04L12/6418 , H04L2012/6429 , H04L2012/6481
摘要: A small and economical voice packet assembling/disassembling (PAD) apparatus, which comprises only one packet assembler/disassembler for a plurality of channels. The packet assembler receives coded voice data from a plurality of CODECs provided for each channel, and assembles voice packets by using the coded voice data. The packet disassembler disassembles voice packets to coded voice data and supplies them to a plurality of CODECs provided for each channel.
摘要翻译: 一种小而经济的语音分组组合/分解(PAD)装置,其仅包括用于多个信道的一个分组组装/分解器。 分组汇编器从为每个信道提供的多个CODEC接收编码的语音数据,并通过使用编码的语音数据来组装语音分组。 分组分解器将语音分组拆分为编码的语音数据,并将它们提供给为每个频道提供的多个编解码器。
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公开(公告)号:US08120930B2
公开(公告)日:2012-02-21
申请号:US12090697
申请日:2006-10-19
申请人: Shin Kanno , Mitsuo Hattori , Mamoru Sato , Kenji Iguchi
发明人: Shin Kanno , Mitsuo Hattori , Mamoru Sato , Kenji Iguchi
IPC分类号: H02M3/335
CPC分类号: H02M7/125 , Y10T307/625
摘要: An output node at a plus side of a diode bridge (DB2) is connected to a drain of a transistor (Q1), and a source of the transistor (Q1) is connected to an output node at a minus side the diode bridge (DB2). One end of a resister (R1) is connected to the drain of the transistor (Q1), and the other end of the resister (R1) is connected to a gate of the transistor (Q1). One end of a resister (R2) is connected to the gate of the transistor (Q1), and the other end of the resister (R2) is connected to the source of the transistor (Q1). A capacitor (C1) is connected in parallel to the resister (R2).
摘要翻译: 二极管桥(DB2)的正面的输出节点连接到晶体管(Q1)的漏极,晶体管(Q1)的源极连接到二极管桥(DB2)的负侧的输出节点 )。 电阻器(R1)的一端连接到晶体管(Q1)的漏极,并且电阻(R1)的另一端连接到晶体管(Q1)的栅极。 电阻器(R2)的一端连接到晶体管(Q1)的栅极,并且电阻(R2)的另一端连接到晶体管(Q1)的源极。 电容器(C1)与电阻器(R2)并联连接。
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