公开(公告)号：US20070177056A1

公开(公告)日：2007-08-02

申请号：US11732434

申请日：2007-04-03

Applicant: Qinggang Zhou ,  Clyde Nagakura ,  Sheng-Fu Wu ,  Andrew Chan

Inventor： Qinggang Zhou ,  Clyde Nagakura ,  Sheng-Fu Wu ,  Andrew Chan

IPC: H04N7/01 ,  H04N5/14

CPC classification number: H04N7/0135 ,  G06T3/4023 ,  G09G5/363 ,  G09G2310/0229 ,  G09G2320/106 ,  G09G2340/0407 ,  H04N5/21 ,  H04N7/012

Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.

公开(公告)号：US07218355B2

公开(公告)日：2007-05-15

申请号：US10722340

申请日：2003-11-25

Applicant: Qinggang Zhou ,  Clyde H. Nagakura ,  Sheng-Fu Wu ,  Andrew K. Chan

Inventor： Qinggang Zhou ,  Clyde H. Nagakura ,  Sheng-Fu Wu ,  Andrew K. Chan

IPC: H04N7/01

CPC classification number: G09G5/363 ,  G06T3/4023 ,  G09G2310/0229 ,  G09G2320/106 ,  G09G2340/0407 ,  H04N5/21 ,  H04N7/012

Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.

Abstract translation: 显示处理器集成电路包括显示处理器部分和片上可编程逻辑部分。 可编程逻辑部分可被配置为实现定制的视频和/或图像增强功能。 显示处理器部分执行基于块的运动检测。 如果对于给定的像素块没有检测到运动，则使用时间插值来填充块中的行间隙。 如果检测到运动，则使用空间插值填充行间隙。 为了保持精度而不会不适当地增加计算复杂度，在不检测到低角度倾斜条件的情况下采用较不复杂的高角度空间插值方法。 因此，在低角度倾斜条件下可以采用更计算密集的低角度空间插值方法。 在读取其他部分的同时进行插值处理的同时，通过采用流水线来编写段缓冲器的部分来减少集成电路成本。

公开(公告)号：US07202908B2

公开(公告)日：2007-04-10

申请号：US10721376

申请日：2003-11-25

Applicant: Qinggang Zhou ,  Clyde H. Nagakura ,  Sheng-Fu Wu ,  Andrew K. Chan

Inventor： Qinggang Zhou ,  Clyde H. Nagakura ,  Sheng-Fu Wu ,  Andrew K. Chan

IPC: H04N7/01 ,  H04N11/02

CPC classification number: H04N7/0135 ,  G06T3/4023 ,  G09G5/363 ,  G09G2310/0229 ,  G09G2320/106 ,  G09G2340/0407 ,  H04N5/21 ,  H04N7/012

Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.

Abstract translation: 显示处理器集成电路包括显示处理器部分和片上可编程逻辑部分。 可编程逻辑部分可被配置为实现定制的视频和/或图像增强功能。 显示处理器部分执行基于块的运动检测。 如果对于给定的像素块没有检测到运动，则使用时间插值来填充块中的行间隙。 如果检测到运动，则使用空间插值填充行间隙。 为了保持精度而不会不适当地增加计算复杂度，在不检测到低角度倾斜条件的情况下采用较不复杂的高角度空间插值方法。 因此，在低角度倾斜条件下可以采用更计算密集的低角度空间插值方法。 在读取其他部分的同时进行插值处理的同时，通过采用流水线来编写段缓冲器的部分来减少集成电路成本。

公开(公告)号：US5927434A

公开(公告)日：1999-07-27

申请号：US210881

申请日：1998-12-15

Applicant: Sheng-Fu Wu

Inventor： Sheng-Fu Wu

IPC: E06C9/14 ,  E06C9/00

CPC classification number: E06C9/14

Abstract: An extensible ladder includes an upper frame, an up and down transmitting unit and a first and a second extensible frame. The first and the second extensible frame each have a plurality of pairs of crisscrossing rods pivotally connected with each other. Plural ladder steps and connecting rods are pivotally connected between the first and the second extensible frame. The connecting rods are pivotally connected to guide blocks, which have a vertical threaded hole for each of two threaded rods of the up and down transmitting unit to fit in and engage. Then each threaded rod has a clockwise threaded portion and counterclockwise threaded portion engaging the vertical threaded holes of the guide blocks. When an active rod with two worm sections is rotated by two worm gears combined with splines with an upper spline shaft portion of the two threaded rods, the active rod rotates the threaded rods, forcing the two extensible frames to extend down or shrink up.

Abstract translation: 可伸展梯子包括上框架，上下传动单元和第一和第二可伸展框架。 第一和第二可延伸框架各自具有彼此枢转连接的多对交叉杆。 多个梯阶和连杆在第一和第二可伸展框架之间枢转地连接。 连杆可枢转地连接到引导块，引导块具有用于上下传动单元的两个螺杆中的每一个的垂直螺纹孔，以适应和接合。 然后，每个螺纹杆具有接合引导块的垂直螺纹孔的顺时针螺纹部分和逆时针螺纹部分。 当具有两个蜗杆部分的活动杆通过两个与两个螺杆的上花键轴部分的花键组合的蜗轮旋转时，活动杆旋转螺杆，迫使两个可延伸框架向下延伸或收缩。

公开(公告)号：US07830449B2

公开(公告)日：2010-11-09

申请号：US11732434

申请日：2007-04-03

Applicant: Qinggang Zhou ,  Clyde H. Nagakura ,  Sheng-Fu Wu ,  Andrew K. Chan

Inventor： Qinggang Zhou ,  Clyde H. Nagakura ,  Sheng-Fu Wu ,  Andrew K. Chan

IPC: H04N7/01 ,  H04N11/02

CPC classification number: H04N7/0135 ,  G06T3/4023 ,  G09G5/363 ,  G09G2310/0229 ,  G09G2320/106 ,  G09G2340/0407 ,  H04N5/21 ,  H04N7/012

Abstract: A display processor integrated circuit includes a display processor portion and an on-chip programmable logic portion. The programmable logic portion can be configured to implement custom video and/or image enhancement functions. The display processor portion performs block-based motion detection. If no motion is detected for a given block of pixels, then interline gaps in the block are filled using temporal interpolation. If motion is detected, then interline gaps are filled using spatial interpolation. To maintain accuracy without unduly increasing computational complexity, a less complex high angle spatial interpolation method is employed where a low angle tilt condition is not detected. A more computationally intensive low angle spatial interpolation method can therefore be employed in low angle tilt conditions. Integrated circuit cost is reduced by employing pipelining to write parts of segment buffers at the same time that other parts are being read to perform the interpolation process.

Abstract translation: 显示处理器集成电路包括显示处理器部分和片上可编程逻辑部分。 可编程逻辑部分可被配置为实现定制的视频和/或图像增强功能。 显示处理器部分执行基于块的运动检测。 如果对于给定的像素块没有检测到运动，则使用时间插值来填充块中的行间隙。 如果检测到运动，则使用空间插值填充行间隙。 为了保持精度而不会不适当地增加计算复杂度，在不检测到低角度倾斜条件的情况下采用较不复杂的高角度空间插值方法。 因此，在低角度倾斜条件下可以采用更计算密集的低角度空间插值方法。 在读取其他部分的同时进行插值处理的同时，通过采用流水线来编写段缓冲器的部分来减少集成电路成本。