公开(公告)号：US07722359B1

公开(公告)日：2010-05-25

申请号：US11862800

申请日：2007-09-27

申请人： Ralph C. Frangioso, Jr. ,  Robert Wierzbicki

发明人： Ralph C. Frangioso, Jr. ,  Robert Wierzbicki

IPC分类号： H01R12/10

CPC分类号： H05K7/1445 ,  H05K7/20563

摘要： A connection assembly has a midplane, first midplane connectors and second midplane connectors. The midplane is divided into an airflow section and a connector section by a dividing line. The midplane defines a first side and a second side which faces away from the first side. The airflow section provides airflow passageways connecting spaces on both sides of the midplane. The connector section provides (i) first mounting locations which are confined to the connector section on the first side and (ii) second mounting locations which are confined to the connector section on the second side. The first midplane connectors are arranged to connect to first circuit board modules, and are mounted over the first mounting locations on the first side. The set of second midplane connectors are arranged to connect to second circuit board modules, and are mounted over the second mounting locations on the second side.

摘要翻译： 连接组件具有中平面，第一中平面连接器和第二中平面连接器。 中间平面通过分界线分为气流部分和连接器部分。 中间平面限定第一侧和第二侧，其面向远离第一侧。 气流部分提供连接中平面两侧空间的气流通道。 连接器部分提供（i）限定在第一侧上的连接器部分上的第一安装位置和（ii）限制在第二侧上的连接器部分的第二安装位置。 第一中平面连接器布置成连接到第一电路板模块，并且安装在第一侧上的第一安装位置上。 该组第二中平面连接器布置成连接到第二电路板模块，并且安装在第二侧上的第二安装位置上。

公开(公告)号：US20060069927A1

公开(公告)日：2006-03-30

申请号：US10878300

申请日：2004-06-28

申请人： Robert Wierzbicki

发明人： Robert Wierzbicki

IPC分类号： G06F1/26

CPC分类号： G06F1/26

摘要： Several processors have specifications setting forth that each processor be coupled to a separate specified voltage regulator circuit. Instead, a number of specified voltage regulator circuit(s) is coupled to the several processors. The number of voltage regulator circuit(s) is less than the number of processors. The processors and voltage regulator circuit(s) are coupled to a module, and a thermal limit for the module is maintained because the several processors are coupled to the smaller number of voltage regulator circuits.

摘要翻译： 几个处理器具有规定，每个处理器耦合到单独的指定电压调节器电路。 相反，许多指定的电压调节器电路耦合到几个处理器。 电压调节器电路的数量小于处理器的数量。 处理器和电压调节器电路耦合到模块，并且由于几个处理器耦合到较小数量的稳压器电路，因此维持模块的热限制。

公开(公告)号：US07445457B1

公开(公告)日：2008-11-04

申请号：US11862761

申请日：2007-09-27

申请人： Ralph C. Frangioso, Jr. ,  Robert Wierzbicki ,  Michael L. Schillinger

发明人： Ralph C. Frangioso, Jr. ,  Robert Wierzbicki ,  Michael L. Schillinger

IPC分类号： H01R12/00

CPC分类号： H01R12/523 ,  H01R12/7082 ,  H05K1/115 ,  H05K1/14 ,  H05K1/18 ,  H05K3/306 ,  H05K3/3447 ,  H05K7/1445 ,  H05K2201/044 ,  H05K2201/09609 ,  H05K2201/10189 ,  H05K2201/10545

摘要： A midplane has plated through holes (PTHs) which form a first profile and a second profile. The first profile has (i) an overlapping portion which overlaps at least part of the second profile and (ii) a non-overlapping portion which does not overlap any part of the second profile. A first connector mounts to a first side of the midplane over the first profile, and a second connector mounts to a second side of the midplane over the second profile. At least one PTH is a shared PTH which resides in both the first and second profiles and which engages a pin of the first connector and a pin of the second connector. Additionally, at least one PTH is a non-shared PTH which resides in the non-overlapping portion of the first profile and which engages a pin of the first connector without engaging any pins of the second connector.

摘要翻译： 中间板具有形成第一轮廓和第二轮廓的通孔（PTH）。 第一轮廓具有（i）与第二轮廓的至少一部分重叠的重叠部分和（ii）不与第二轮廓的任何部分重叠的非重叠部分。 第一连接器在第一轮廓上安装到中平面的第一侧，并且第二连接器在第二轮廓上安装到中平面的第二侧。 至少一个PTH是驻留在第一和第二轮廓中并且与第一连接器的销和第二连接器的销接合的共享PTH。 另外，至少一个PTH是驻留在第一轮廓的非重叠部分中并且与第一连接器的销接合而不与第二连接器的任何销接合的非共享PTH。

公开(公告)号：US20050289217A1

公开(公告)日：2005-12-29

申请号：US10878164

申请日：2004-06-28

申请人： Ralph Frangioso ,  Robert Wierzbicki

发明人： Ralph Frangioso ,  Robert Wierzbicki

IPC分类号： G06F3/06 ,  G06F12/00

CPC分类号： G06F3/0661 ,  G06F3/0607 ,  G06F3/0626 ,  G06F3/0658 ,  G06F3/067

摘要： A storage solution includes a first enclosure having modules and non-volatile memory, such as hard disk drives. These modules convert file I/O to block I/O. A second enclosure includes second modules and non-volatile memory. These modules are operable to cause the block I/O to be stored on the non-volatile storage in either the first or second enclosure. Thus, the modules that perform block I/O storage can access storage that resides in the file I/O server. In a different arrangement, the storage system has an enclosure having modules and non-volatile memory. One module converts file I/O to block I/O. Another module transfers block I/O to the non-volatile memory. The first and second modules are interconnected via a data bus. Block I/O is transferred between the first module and the second module via the data bus. The data bus crosses a midplane that interconnects the modules. The second module stores data in the enclosure.

摘要翻译： 存储解决方案包括具有模块和非易失性存储器的第一外壳，例如硬盘驱动器。 这些模块将文件I / O转换为块I / O。 第二个外壳包括第二个模块和非易失性存储器。 这些模块可操作以使块I / O存储在第一或第二外壳中的非易失性存储器上。 因此，执行块I / O存储的模块可以访问驻留在文件I / O服务器中的存储。 在不同的布置中，存储系统具有具有模块和非易失性存储器的外壳。 一个模块将文件I / O转换为块I / O。 另一个模块将块I / O传输到非易失性存储器。 第一和第二模块通过数据总线相互连接。 块I / O通过数据总线在第一模块和第二模块之间传输。 数据总线穿过互连模块的中间平面。 第二个模块将数据存储在机箱中。