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    Methods and memory devices for repairing memory cells
    1.
    发明授权
    Methods and memory devices for repairing memory cells 有权
    用于修复存储器单元的方法和存储器件

    公开(公告)号：US08509016B2

    公开(公告)日：2013-08-13

    申请号：US13420468

    申请日：2012-03-14

    申请人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    发明人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    IPC分类号： G11C29/00

    CPC分类号： G11C29/76

    摘要： Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section.

    摘要翻译： 公开了用于修复存储器单元的方法和存储器件，诸如包括具有多个存储单元部分的主阵列的存储器件。 一个这样的主阵列包括多组输入/输出线，其中每一组可以耦合到每个部分中相应的多个存储器单元。 一个这样的存储器设备还包括存储器单元的冗余部分，其数量对应于主阵列的每个部分中的存储器单元的数量。 寻址电路可以包含例如已被确定为有缺陷的部分的记录。 寻址电路可以接收地址并将接收到的地址与缺陷区段的记录进行比较。 在匹配的情况下，寻址电路可以将访问对应于接收到的地址的存储器单元重定向到冗余部分中的存储器单元。

    METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS
    3.
    发明申请
    METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS 有权
    用于修复记忆细胞的方法和存储器件

    公开(公告)号：US20110051538A1

    公开(公告)日：2011-03-03

    申请号：US12547209

    申请日：2009-08-25

    申请人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    发明人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    IPC分类号： G11C29/00 ,  G11C7/06 ,  G11C8/00

    CPC分类号： G11C29/76

    摘要： Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section.

    摘要翻译： 公开了用于修复存储器单元的方法和存储器件，例如包括具有多个存储单元部分的主阵列的存储器件。 一个这样的主阵列包括多组输入/输出线，其中每一组可以耦合到每个部分中相应的多个存储器单元。 一个这样的存储器设备还包括存储器单元的冗余部分，其数量对应于主阵列的每个部分中的存储器单元的数量。 寻址电路可以包含例如已被确定为有缺陷的部分的记录。 寻址电路可以接收地址并将接收到的地址与缺陷区段的记录进行比较。 在匹配的情况下，寻址电路可以将访问对应于接收到的地址的存储器单元重定向到冗余部分中的存储器单元。

    METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS
    5.
    发明申请
    METHODS AND MEMORY DEVICES FOR REPAIRING MEMORY CELLS 有权
    用于修复记忆细胞的方法和存储器件

    公开(公告)号：US20120176851A1

    公开(公告)日：2012-07-12

    申请号：US13420468

    申请日：2012-03-14

    申请人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    发明人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    IPC分类号： G11C29/04

    CPC分类号： G11C29/76

    摘要： Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section.

    摘要翻译： 公开了用于修复存储器单元的方法和存储器件，诸如包括具有多个存储单元部分的主阵列的存储器件。 一个这样的主阵列包括多组输入/输出线，其中每一组可以耦合到每个部分中相应的多个存储器单元。 一个这样的存储器设备还包括存储器单元的冗余部分，其数量对应于主阵列的每个部分中的存储器单元的数量。 寻址电路可以包含例如已被确定为有缺陷的部分的记录。 寻址电路可以接收地址并将接收到的地址与缺陷区段的记录进行比较。 在匹配的情况下，寻址电路可以将访问对应于接收到的地址的存储器单元重定向到冗余部分中的存储器单元。

    Methods and memory devices for repairing memory cells
    6.
    发明授权
    Methods and memory devices for repairing memory cells 有权
    用于修复存储器单元的方法和存储器件

    公开(公告)号：US08144534B2

    公开(公告)日：2012-03-27

    申请号：US12547209

    申请日：2009-08-25

    申请人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    发明人： Aron Lunde ,  Seth Eichmeyer ,  Tim Cowles ,  Patrick Mullarkey

    IPC分类号： G11C29/00

    CPC分类号： G11C29/76

    摘要： Methods and memory devices for repairing memory cells are discloses, such as a memory device that includes a main array having a plurality of sections of memory cells. One such main array includes a plurality of sets of input/output lines, each of which may be coupled to a respective plurality of memory cells in each section. One such memory device also includes a redundant section of memory cells, corresponding in number to the number of memory cells in each of the sections of the main array. An addressing circuit may contain a record of, for example, sections that have been determined to be defective. The addressing circuit may receive an address and compare the received address with the record of defective sections. In the event of a match, the addressing circuit may redirect an access to memory cells corresponding to the received address to memory cells in the redundant section.

    摘要翻译： 公开了用于修复存储器单元的方法和存储器件，例如包括具有多个存储单元部分的主阵列的存储器件。 一个这样的主阵列包括多组输入/输出线，其中每一组可以耦合到每个部分中相应的多个存储器单元。 一个这样的存储器设备还包括存储器单元的冗余部分，其数量对应于主阵列的每个部分中的存储器单元的数量。 寻址电路可以包含例如已被确定为有缺陷的部分的记录。 寻址电路可以接收地址并将接收到的地址与缺陷区段的记录进行比较。 在匹配的情况下，寻址电路可以将访问对应于接收到的地址的存储器单元重定向到冗余部分中的存储器单元。