Voltage-mode passive mixer with integrated input and output buffers

    公开(公告)号:US10545205B2

    公开(公告)日:2020-01-28

    申请号:US15935715

    申请日:2018-03-26

    申请人: Michael Trakimas

    发明人: Michael Trakimas

    IPC分类号: G01R33/36 G01R33/54 G01R33/30

    摘要: Various approaches of receiving signals in integrated circuitry include implementing a voltage-mode passive mixer for down-converting the frequency of the received signals, a baseband output buffer, and a transconductance amplifier coupled between the voltage-mode passive mixer and baseband output buffer for presenting a high-impedance load to the voltage-mode passive mixer and shielding the baseband output buffer from a high-frequency feedthrough.