公开(公告)号：US07809982B2

公开(公告)日：2010-10-05

申请号：US11243508

申请日：2005-10-03

申请人： John Rapp ,  Chandan Mathur ,  Scott Hellenbach ,  Mark Jones ,  Joseph A. Capizzi

发明人： John Rapp ,  Chandan Mathur ,  Scott Hellenbach ,  Mark Jones ,  Joseph A. Capizzi

IPC分类号： G06F11/00

CPC分类号： G06F17/5054 ,  G06F9/54 ,  G06F11/1407 ,  G06F11/1417 ,  G06F11/142 ,  G06F11/2025 ,  G06F11/2028 ,  G06F11/2035 ,  G06F11/2038 ,  G06F11/2051 ,  G06F13/1694 ,  G06F15/7867 ,  G06F15/8053 ,  G06F17/505 ,  H04Q9/00

摘要： A computing machine comprises an electronic circuit operable to perform a function, a programmable integrated circuit such as an FPGA, and a processor. The processor is operable to detect a failure of the electronic circuit and to configure the programmable integrated circuit to perform the function of the electronic circuit in response to detecting the failure. Alternatively, the computing machine comprises a hardwired pipeline operable to perform a function and a processor operable to detect a failure of the pipeline and to perform the function in response to detecting the failure. By allowing a first type of circuit (e.g., an FPGA) to take over for a failed second type of circuit (e.g., a processor), such a computing machine can be fault-tolerant without having redundant versions of each component, and may thus be less expensive and smaller than computing machines of comparable computing power.

摘要翻译： 计算机包括可执行功能的电子电路，诸如FPGA的可编程集成电路和处理器。 处理器可操作以检测电子电路的故障并且配置可编程集成电路以响应于检测到故障来执行电子电路的功能。 或者，计算机包括可操作以执行功能的硬连线管线和可操作以检测管道故障并且响应于检测到故障而执行功能的处理器。 通过允许第一类电路（例如，FPGA）接管故障的第二类电路（例如，处理器），这样的计算机可以是容错的，而不需要每个组件的冗余版本，并且因此可以 比较可靠的计算能力的计算机更便宜，更小。

公开(公告)号：US07676649B2

公开(公告)日：2010-03-09

申请号：US11243507

申请日：2005-10-03

申请人： John Rapp ,  Chandan Mathur ,  Scott Hellenbach ,  Mark Jones ,  Joseph A. Capizzi

发明人： John Rapp ,  Chandan Mathur ,  Scott Hellenbach ,  Mark Jones ,  Joseph A. Capizzi

IPC分类号： G06F15/76 ,  G06F11/00 ,  G06F11/16 ,  G06F9/00

CPC分类号： G06F17/5054 ,  G06F9/54 ,  G06F11/1407 ,  G06F11/1417 ,  G06F11/142 ,  G06F11/2025 ,  G06F11/2028 ,  G06F11/2035 ,  G06F11/2038 ,  G06F11/2051 ,  G06F13/1694 ,  G06F15/7867 ,  G06F15/8053 ,  G06F17/505 ,  H04Q9/00

摘要： According to an embodiment of the invention, a computing machine comprises a pipeline accelerator, a host processor coupled to the pipeline accelerator, and a redundant processor, a redundant pipeline unit, or both, coupled to the host processor and to the pipeline accelerator. The computing machine may also include a system-restore server and a system-restore bus that allow the machine to periodically save the machine states in case of a failure. Such a computing machine has a fault-tolerant scheme that is often more flexible than conventional schemes. For example, if the pipeline accelerator has more extra “space” than the host processor, then one can add to the computing machine one or more redundant pipeline units that can provide redundancy to both the pipeline and the host processor. Therefore, the computing machine can include redundancy for the host processor even though it has no redundant processing units.

摘要翻译： 根据本发明的实施例，计算机器包括流水线加速器，耦合到流水线加速器的主机处理器，以及耦合到主机处理器和流水线加速器的冗余处理器，冗余流水线单元或两者。 计算机还可以包括系统恢复服务器和系统恢复总线，其允许机器在发生故障的情况下周期性地保存机器状态。 这样的计算机具有通常比常规方案更灵活的容错方案。 例如，如果流水线加速器具有比主处理器更多的“空间”，则可以向计算机添加一个或多个冗余流水线单元，其可以为流水线和主机处理器提供冗余。 因此，即使计算机没有冗余处理单元，计算机也可以包括主机处理器的冗余。