公开(公告)号：US09293353B2

公开(公告)日：2016-03-22

申请号：US13658652

申请日：2012-10-23

申请人： Maolin Long ,  Alex Paterson ,  Ricky Marsh ,  Ying Wu ,  John Drewery

发明人： Maolin Long ,  Alex Paterson ,  Ricky Marsh ,  Ying Wu ,  John Drewery

IPC分类号： C23C16/00 ,  H01L21/306 ,  H01L21/67 ,  H05K9/00 ,  H01J37/32

CPC分类号： H01L21/67069 ,  H01J37/32651 ,  H05K9/00

摘要： A Faraday shield and a plasma processing chamber incorporating the Faraday shield is are provided. The plasma chamber includes an electrostatic chuck for receiving a substrate, a dielectric window connected to a top portion of the chamber, the dielectric window disposed over the electrostatic chuck, and a Faraday shield. The Faraday shield is disposed inside of the chamber and defined between the electrostatic chuck and the dielectric window. The Faraday shield includes an inner zone having an inner radius range that includes a first and second plurality of slots and an outer zone having an outer radius range that includes a third plurality of slots. The inner zone is adjacent to the outer zone. The Faraday shield also includes a band ring separating the inner zone and the outer zone, such that the first and second plurality of slots do not connect with the third plurality of slots.

摘要翻译： 提供了法拉第屏蔽和包含法拉第屏蔽的等离子体处理室。 等离子体室包括用于接收基板的静电卡盘，连接到腔室的顶部的介电窗口，设置在静电卡盘上的电介质窗口和法拉第屏蔽件。 法拉第屏蔽设置在室内并限定在静电卡盘和电介质窗口之间。 法拉第屏蔽包括具有包括第一和第二多个狭槽的内半径范围的内区和具有包括第三多个槽的外半径范围的外区。 内部区域与外部区域相邻。 法拉第屏蔽还包括分隔内区和外区的带环，使得第一和第二多个槽不与第三多个槽连接。

公开(公告)号：US07799200B1

公开(公告)日：2010-09-21

申请号：US11544957

申请日：2006-10-05

申请人： Steven T. Mayer ,  John Drewery ,  Richard S. Hill ,  Timothy Archer ,  Avishai Kepten

发明人： Steven T. Mayer ,  John Drewery ,  Richard S. Hill ,  Timothy Archer ,  Avishai Kepten

IPC分类号： C25F3/00 ,  H01L21/288 ,  B23H3/00

CPC分类号： B23H5/08 ,  C25F3/16 ,  H01L21/02068 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/7684

摘要： Methods and apparatus are provided for planar metal plating on a workpiece having a surface with recessed regions and exposed surface regions; comprising the steps of: causing a plating accelerator to become attached to said surface including the recessed and exposed surface regions; selectively removing the plating accelerator from the exposed surface regions without performing substantial metal plating on the surface; and after removal of plating accelerator is at least partially complete, plating metal onto the surface, whereby the plating accelerator remaining attached to the surface increases the rate of metal plating in the recessed regions relative to the rate of metal plating in the exposed surface regions.

摘要翻译： 提供了用于在具有凹陷区域和暴露表面区域的表面的工件上进行平面金属电镀的方法和装置; 包括以下步骤：使电镀加速器附着到包括凹入和暴露的表面区域的所述表面; 选择性地从暴露的表面区域去除电镀加速器，而不在表面上进行实质的金属电镀; 在去除电镀促进剂至少部分完成后，将金属镀在表面上，由此保持附着在表面上的电镀加速剂相对于露出的表面区域中的金属电镀速率增加凹陷区域中的金属电镀速率。

公开(公告)号：US09490106B2

公开(公告)日：2016-11-08

申请号：US13198683

申请日：2011-08-04

申请人： John Drewery ,  Maolin Long ,  Alex Paterson

发明人： John Drewery ,  Maolin Long ,  Alex Paterson

IPC分类号： H01J37/32

CPC分类号： H01J37/32651 ,  H01J37/321 ,  H01J37/32633

摘要： Plasma processing chambers having internal Faraday shields with defined groove configurations, are defined. In one example, the chamber includes an electrostatic chuck for receiving a substrate and a dielectric window connected to a top portion of the chamber, where the dielectric window disposed over the electrostatic chuck. Also included is a Faraday shield disposed inside of the chamber and defined between the electrostatic chuck and the dielectric window. The Faraday shield includes an inner zone having an inner radius range, a middle zone having a middle radius range, an outer zone having an outer radius range, where the inner zone is adjacent to the middle zone, and the middle zone being adjacent to the outer zone. Further defining the Faraday shield is a first set of radial slots (A) extending through the inner zone, the middle zone, and the outer zone, a second set of radial slots (C) extending through only the outer zone; and a third set of radial slots (B) extending through the middle zone and outer zone. In this configuration, the first, second and third radial slots are arranged radially around the Faraday shield in a repeating pattern of slots A, C, B, and C.

摘要翻译： 定义了具有限定凹槽结构的具有内部法拉第屏蔽的等离子体处理室。 在一个示例中，腔室包括用于接收衬底的静电吸盘和连接到室的顶部的介电窗口，其中介电窗设置在静电吸盘上方。 还包括设置在室内部并限定在静电卡盘和电介质窗口之间的法拉第屏蔽。 法拉第屏蔽包括具有内半径范围的内区域，具有中间半径范围的中间区域，具有外半径范围的外区域，其中内区域与中间区域相邻，中间区域邻近 外部区域 进一步限定法拉第屏蔽是延伸穿过内部区域，中间区域和外部区域的第一组径向狭槽（A），仅延伸穿过外部区域的第二组径向狭槽（C）; 以及延伸穿过中间区域和外部区域的第三组径向狭槽（B）。 在这种构造中，第一，第二和第三径向狭缝围绕法拉第屏蔽件以狭槽A，C，B和C的重复图案径向布置。

公开(公告)号：US09076831B2

公开(公告)日：2015-07-07

申请号：US13410243

申请日：2012-03-01

申请人： John Drewery

发明人： John Drewery

IPC分类号： H01L21/687 ,  H01L21/683

CPC分类号： H01L21/6833

摘要： An electrostatic chuck includes an electrically conductive baseplate and an electrically non-conductive substrate support member disposed on the baseplate. First and second sets of clamp electrodes are disposed within the support member. A power supply system includes a clamp power supply, a center tap power supply, and a baseplate power supply. The clamp power supply generates a positive output voltage and a negative output voltage, each of which is equidistant from a center tap voltage. The positive output voltage is electrically connected to the first set of clamp electrodes. The negative output voltage is electrically connected to the second set of clamp electrodes. The center tap power supply is defined to control the center tap voltage of the clamp power supply. The baseplate power supply is defined to generate a baseplate output voltage independent from the center tap voltage. The baseplate output voltage is electrically connected to the baseplate.

摘要翻译： 静电卡盘包括导电基板和设置在基板上的非导电基板支撑构件。 第一和第二组钳位电极设置在支撑构件内。 电源系统包括钳位电源，中心抽头电源和基板电源。 钳位电源产生正输出电压和负输出电压，每个电压与中心抽头电压等距。 正输出电压电连接到第一组钳位电极。 负输出电压电连接到第二组钳位电极。 中心抽头电源被定义为控制钳位电源的中心抽头电压。 基板电源被定义为产生独立于中心抽头电压的基板输出电压。 底板输出电压电连接到基板。

公开(公告)号：US07391086B1

公开(公告)日：2008-06-24

申请号：US11478150

申请日：2006-06-28

申请人： John Drewery ,  Francisco Juarez ,  Henner Meinhold

发明人： John Drewery ,  Francisco Juarez ,  Henner Meinhold

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： B24B37/24 ,  B23H5/08 ,  B24B37/046

摘要： Conductive contacts and methods for fabricating conductive contacts for electrochemical mechanical planarization are provided. A conductive contact in accordance with an exemplary embodiment of the invention includes, but is not limited to, a first conductive surface formed of a flexible material, a conductive element that is disposed remote from the first conductive surface and that is configured for electrical coupling to an external circuit, and an intermediate portion that electrically couples the first conductive surface and the conductive element.

摘要翻译： 提供用于制造用于电化学机械平面化的导电触头的导电触头和方法。 根据本发明的示例性实施例的导电接触包括但不限于由柔性材料形成的第一导电表面，远离第一导电表面设置的导电元件，其被配置用于电耦合到 外部电路和电耦合第一导电表面和导电元件的中间部分。

公开(公告)号：US20130186568A1

公开(公告)日：2013-07-25

申请号：US13658652

申请日：2012-10-23

申请人： Maolin Long ,  Alex Paterson ,  Ricky Marsh ,  Ying Wu ,  John Drewery

发明人： Maolin Long ,  Alex Paterson ,  Ricky Marsh ,  Ying Wu ,  John Drewery

IPC分类号： H01L21/67 ,  H05K9/00

CPC分类号： H01L21/67069 ,  H01J37/32651 ,  H05K9/00

摘要： A Faraday shield and a plasma processing chamber incorporating the Faraday shield is are provided. The plasma chamber includes an electrostatic chuck for receiving a substrate, a dielectric window connected to a top portion of the chamber, the dielectric window disposed over the electrostatic chuck, and a Faraday shield. The Faraday shield is disposed inside of the chamber and defined between the electrostatic chuck and the dielectric window. The Faraday shield includes an inner zone having an inner radius range that includes a first and second plurality of slots and an outer zone having an outer radius range that includes a third plurality of slots. The inner zone is adjacent to the outer zone. The Faraday shield also includes a band ring separating the inner zone and the outer zone, such that the first and second plurality of slots do not connect with the third plurality of slots.

摘要翻译： 提供了法拉第屏蔽和包含法拉第屏蔽的等离子体处理室。 等离子体室包括用于接收基板的静电卡盘，连接到腔室的顶部的介电窗口，设置在静电卡盘上的电介质窗口和法拉第屏蔽件。 法拉第屏蔽设置在室内并限定在静电卡盘和电介质窗口之间。 法拉第屏蔽包括具有包括第一和第二多个狭槽的内半径范围的内区和具有包括第三多个槽的外半径范围的外区。 内部区域与外部区域相邻。 法拉第屏蔽还包括分隔内区和外区的带环，使得第一和第二多个槽不与第三多个槽连接。

公开(公告)号：US20110151678A1

公开(公告)日：2011-06-23

申请号：US12964110

申请日：2010-12-09

申请人： Kaihan Ashtiani ,  Michael Wood ,  John Drewery ,  Naohiro Shoda ,  Bart van Schravendijk ,  Lakshminarayana Nittala ,  Nerissa Draeger

发明人： Kaihan Ashtiani ,  Michael Wood ,  John Drewery ,  Naohiro Shoda ,  Bart van Schravendijk ,  Lakshminarayana Nittala ,  Nerissa Draeger

IPC分类号： H01L21/31

CPC分类号： H01L21/02274 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02208 ,  H01L21/76224

摘要： Novel gap fill schemes involving depositing both flowable oxide films and high density plasma chemical vapor deposition oxide (HDP oxide) films are provided. According to various embodiments, the flowable oxide films may be used as a sacrificial layer and/or as a material for bottom up gap fill. In certain embodiments, the top surface of the filled gap is an HDP oxide film. The resulting filled gap may be filled only with HDP oxide film or a combination of HDP oxide and flowable oxide films. The methods provide improved top hat reduction and avoid clipping of the structures defining the gaps.

摘要翻译： 提供了包括沉积可流动氧化物膜和高密度等离子体化学气相沉积氧化物（HDP氧化物）膜的新型间隙填充方案。 根据各种实施方案，可流动的氧化物膜可以用作牺牲层和/或用作自底向上间隙填充的材料。 在某些实施例中，填充间隙的顶表面是HDP氧化物膜。 所得到的填充间隙可以仅用HDP氧化物膜或HDP氧化物和可流动氧化物膜的组合填充。 这些方法提供了改进的顶帽减少并且避免了限定间隙的结构的限制。

公开(公告)号：US08728958B2

公开(公告)日：2014-05-20

申请号：US12964110

申请日：2010-12-09

申请人： Kaihan Ashtiani ,  Michael Wood ,  John Drewery ,  Naohiro Shoda ,  Bart van Schravendijk ,  Lakshminarayana Nittala ,  Nerissa Draeger

发明人： Kaihan Ashtiani ,  Michael Wood ,  John Drewery ,  Naohiro Shoda ,  Bart van Schravendijk ,  Lakshminarayana Nittala ,  Nerissa Draeger

IPC分类号： H01L21/31 ,  H01L21/469

CPC分类号： H01L21/02274 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02208 ,  H01L21/76224

摘要： Novel gap fill schemes involving depositing both flowable oxide films and high density plasma chemical vapor deposition oxide (HDP oxide) films are provided. According to various embodiments, the flowable oxide films may be used as a sacrificial layer and/or as a material for bottom up gap fill. In certain embodiments, the top surface of the filled gap is an HDP oxide film. The resulting filled gap may be filled only with HDP oxide film or a combination of HDP oxide and flowable oxide films. The methods provide improved top hat reduction and avoid clipping of the structures defining the gaps.

摘要翻译： 提供了包括沉积可流动氧化物膜和高密度等离子体化学气相沉积氧化物（HDP氧化物）膜的新型间隙填充方案。 根据各种实施方案，可流动的氧化物膜可以用作牺牲层和/或用作自底向上间隙填充的材料。 在某些实施例中，填充间隙的顶表面是HDP氧化物膜。 所得到的填充间隙可以仅用HDP氧化物膜或HDP氧化物和可流动氧化物膜的组合填充。 这些方法提供了改进的顶帽减少并且避免了限定间隙的结构的限制。

公开(公告)号：US07456101B1

公开(公告)日：2008-11-25

申请号：US11724091

申请日：2007-03-13

申请人： Sanjay Gopinath ,  Jeremie Dalton ,  Jason M. Blackburn ,  John Drewery ,  Willibrordus Gerardus Maria van den Hoek

发明人： Sanjay Gopinath ,  Jeremie Dalton ,  Jason M. Blackburn ,  John Drewery ,  Willibrordus Gerardus Maria van den Hoek

IPC分类号： H01L21/4763

CPC分类号： H01L21/76841 ,  C23C16/0272 ,  C23C16/18 ,  C23C16/45529 ,  H01L21/28556

摘要： Methods for depositing a ruthenium metal layer on a dielectric substrate are provided. The methods involve, for instance, exposing the dielectric substrate to an amine-containing compound, followed by exposing the substrate to a ruthenium precursor and an optional co-reactant such that the amine-containing compound facilitates the nucleation on the dielectric surface.

摘要翻译： 提供了在电介质基片上沉积钌金属层的方法。 所述方法包括例如将电介质基底暴露于含胺化合物，然后将基底暴露于钌前体和任选的共反应物，使得含胺化合物有助于电介质表面上的成核。

公开(公告)号：US07211509B1

公开(公告)日：2007-05-01

申请号：US10868384

申请日：2004-06-14

申请人： Sanjay Gopinath ,  Jeremie Dalton ,  Jason M. Blackburn ,  John Drewery ,  Willibrordus Gerardus Maria van den Hoek

发明人： Sanjay Gopinath ,  Jeremie Dalton ,  Jason M. Blackburn ,  John Drewery ,  Willibrordus Gerardus Maria van den Hoek

IPC分类号： H01L21/4763

CPC分类号： H01L21/76841 ,  C23C16/0272 ,  C23C16/18 ,  C23C16/45529 ,  H01L21/28556

摘要： Methods for depositing a ruthenium metal layer on a dielectric substrate are provided. The methods involve, for instance, exposing the dielectric substrate to an amine-containing compound, followed by exposing the substrate to a ruthenium precursor and an optional co-reactant such that the amine-containing compound facilitates the nucleation on the dielectric surface.

摘要翻译： 提供了在电介质基片上沉积钌金属层的方法。 所述方法包括例如将电介质基底暴露于含胺化合物，然后将基底暴露于钌前体和任选的共反应物，使得含胺化合物有助于电介质表面上的成核。