公开(公告)号：US06873670B1

公开(公告)日：2005-03-29

申请号：US10264358

申请日：2002-10-04

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H03D3/24 ,  H03L7/089 ,  H03L7/197

CPC分类号： H03L7/197 ,  H03L7/0891

摘要： A phase locked loop (PLL) system is arranged to automatically adjust the pre-scaler divide ratio. The PLL includes a phase-frequency detector circuit that compares a feedback clock signal to an input clock signal to provide UP and DOWN signals. A charge-pump circuit provides an oscillator control signal in response to UP and DOWN. A VCO produces an oscillator signal in response to the oscillator control signal. A first divider circuit provides an output clock signal in response to the oscillator signal, where an up-down counter circuit controls the divider ratio. A second divider circuit provides the feedback clock signal in response to the output clock signal. The up-down counter evaluates the output of the window comparator, which analyzes the oscillator control signal for proper operation with the VCO.

摘要翻译： 锁相环（PLL）系统被配置为自动调节预分频器分频比。 PLL包括相位频率检测器电路，其将反馈时钟信号与输入时钟信号进行比较，以提供UP和DOWN信号。 电荷泵电路响应于UP和DOWN提供振荡器控制信号。 VCO产生响应于振荡器控制信号的振荡器信号。 第一分频电路响应于振荡器信号提供输出时钟信号，其中升降计数器电路控制分频比。 第二分频器电路响应输出时钟信号提供反馈时钟信号。 上拉计数器评估窗口比较器的输出，该比较器分析振荡器控制信号以便与VCO正常工作。

公开(公告)号：US06670851B1

公开(公告)日：2003-12-30

申请号：US09615293

申请日：2000-07-13

申请人： Peyman Hojabri ,  Hon Kin Chiu

发明人： Peyman Hojabri ,  Hon Kin Chiu

IPC分类号： H03F122

CPC分类号： H03F3/195

摘要： A cascode amplifier integrated circuit (IC) with frequency compensation capability that possesses a tight overall variation in transient rise and fall time, is relatively small in size and has a relatively high RC series circuit breakdown voltage. The cascode amplifier IC includes an input bias terminal configured to receive a bias voltage Vb, a power supply input terminal configured to receive a power supply voltage Vcc, an input signal terminal configured to receive an input voltage signal Vin, and an output signal terminal. The cascode amplifier IC also includes a gain stage circuit, an output buffer stage circuit and a resistance-capacitance (RC) series circuit configured to provide frequency compensation during operation of the cascode amplifier IC. The RC series circuit has a peaking bipolar transistor configured to provide a bipolar junction peaking capacitance between the output signal terminal and the gain stage circuit. The bipolar junction peaking capacitance can be provided, for example, as a reverse biased base-collector junction capacitance (Cbc) of an NPN peaking bipolar transistor. The cascode amplifier IC is smaller in size than conventional cascode amplifier ICs, since the size of the peaking bipolar transistor is smaller than conventional metal-polysilicon peaking capacitors. Furthermore, the collector-base breakdown voltage BVcb of the peaking bipolar transistor is higher than the breakdown voltage of conventional metal-polysilicon peaking capacitors.

摘要翻译： 具有频率补偿能力的共源共栅放大器集成电路（IC）在瞬态上升和下降时间内具有严格的总体变化，尺寸相对较小并且具有相对较高的RC串联电路击穿电压。 串联放大器IC包括被配置为接收偏置电压Vb的输入偏置端子，被配置为接收电源电压Vcc的电源输入端子，被配置为接收输入电压信号Vin的输入信号端子和输出信号端子。 串联放大器IC还包括增益级电路，输出缓冲级电路和电阻电容（RC）串联电路，其被配置为在共源共栅放大器IC的工作期间提供频率补偿。 RC串联电路具有峰值双极晶体管，配置为在输出信号端和增益级电路之间提供双极结峰值电容。 双极结峰值电容可以例如提供为NPN峰值双极晶体管的反向偏置的基极 - 集电极结电容（Cbc）。 共源共栅放大器IC的尺寸比传统的共源共栅放大器IC小，因为峰值双极晶体管的尺寸小于常规的金属 - 多晶硅峰值电容器。 此外，峰值双极晶体管的集电极 - 基极击穿电压BVcb高于常规金属 - 多晶硅峰值电容器的击穿电压。

公开(公告)号：US06483168B1

公开(公告)日：2002-11-19

申请号：US09952593

申请日：2001-09-13

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H01L2900

CPC分类号： H03F3/3432 ,  H01L27/0658 ,  H03F1/22

摘要： An integrated circuit including a resistor that at least partially overlies a first tub of semiconductor material of a first polarity, where the first tub is formed in a second tub of semiconductor material having the opposite polarity, and the second tub is formed in a semiconductor substrate having the first polarity. The second tub forms the base of a vertical bipolar transistor, the first tub forms the emitter of the transistor, and the substrate forms the collector of such transistor. Where the vertical transistor is a PNP transistor, the first tub is the emitter and consists of P-type semiconductor material, the second tub is the base, and the substrate is the collector. Preferably, the resistor is a strip of polysilicon or a set of multiple, series-connected polysilicon segments. Typically, the integrated circuit is an amplifier and the resistor is a gain-setting resistor. In some embodiments, the resistor extends between a first node and a second node (whose potential varies in response to changes in the input signal), and the resistor is implemented with double bootstrapping, in the sense that the first tub is coupled to a third node of the integrated circuit whose potential changes (in response to a change in the input signal) in such a direction as to pull the potential at the second node in a desired direction and the second tub is coupled to a fourth node whose also potential changes (in response to a change in the input signal) in such a direction as to pull the potential at the second node in a desired direction, without significant current leakage from the first tub to the substrate. For example, the integrated circuit can be (or include) a high-speed cascode amplifier, the third node can be the amplifier's output node, and the fourth node can be the base of a bipolar transistor of a cascode Darlington push-pull output stage of the amplifier.

摘要翻译： 一种集成电路，包括至少部分地覆盖第一极性的第一半导体材料桶的电阻器，其中所述第一桶形成在具有相反极性的第二半导体材料桶中，并且所述第二桶形成在半导体衬底中 具有第一极性。 第二个桶形成垂直双极晶体管的基极，第一个桶形成晶体管的发射极，并且衬底形成这种晶体管的集电极。 在垂直晶体管是PNP晶体管的情况下，第一个电池是发射极，由P型半导体材料构成，第二个电池是基极，衬底是集电极。 优选地，电阻器是多晶硅条或一组多个串联连接的多晶硅段。 通常，集成电路是放大器，电阻是增益设置电阻。 在一些实施例中，电阻器在第一节点和第二节点之间延伸（其电位响应于输入信号的变化而变化），并且电阻器在双重自举的情况下实现，这意味着第一个电池管耦合到第三个 电位变化（响应于输入信号的变化）的方式，在将期望方向上的第二节点处的电位拉动的情况下，集成电路的第二节点耦合到也具有电位变化的第四节点 （响应于输入信号的变化）沿着在期望方向上拉动第二节点处的电位的方向，而没有从第一桶到基板的显着的电流泄漏。 例如，集成电路可以是（或包括）高速共源共栅放大器，第三节点可以是放大器的输出节点，并且第四节点可以是级联的达林顿推挽输出级的双极晶体管的基极 的放大器。

公开(公告)号：US5977610A

公开(公告)日：1999-11-02

申请号：US176733

申请日：1998-10-21

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H01L27/08 ,  H01L29/8605

CPC分类号： H01L27/0802

摘要： An integrated circuit, including a resistor having multiple, series-connected resistor segments formed over multiple tubs of semiconductor material of a first polarity in a semiconductor substrate of the opposite polarity. The resistor is implemented with multiple bootstrapping in the sense that all tubs are coupled to a node of the circuit whose potential changes, in response to a changing input signal, in a direction so as to pull the potential at one end of the resistor in a desired direction. Each resistor segment can be formed over a different one of the tubs, or there are more segments than tubs (e.g., more than one segment formed over one of the tubs or at least one segment having no tub under it). In preferred embodiments, the circuit is a high-speed cascode amplifier (or other amplifier), the resistor is a gain-setting resistor coupled to the top rail, and the tubs are coupled to the amplifier's output. Implementing the resistor in accordance with the invention results in faster amplifier response (to a rapidly changing input) and (if the resistor has a field oxide layer between the resistor segments and the underlying semiconductor material) reduced dependence of the response time on the field oxide layer thickness. In a preferred embodiment, the resistor comprises ten segments of polysilicon connected in series over three tubs of N-type semiconductor material in a P-type semiconductor substrate (with a field oxide layer separating each tub from the segment or segments overlying it).

摘要翻译： 一种集成电路，包括具有多个串联连接的电阻器段的电阻器，该电阻器部分形成在相反极性的半导体衬底中的第一极性的多个半导体材料槽上。 电阻器实施有多个自举，这意味着所有的电池都耦合到电路的一个节点，该电路的电位响应于改变的输入信号而在一个方向上变化，以便将电阻器的一端的电位拉到 所需方向。 每个电阻器段可以形成在不同的一个桶中，或者具有比桶更多的段（例如，在一个桶上形成多于一个段或者在其下方没有浴缸的至少一个段）。 在优选实施例中，电路是高速共源共栅放大器（或其他放大器），电阻器是耦合到顶部导轨的增益设置电阻器，并且所述电容器耦合到放大器的输出端。 根据本发明实现电阻器导致更快的放大器响应（对于快速变化的输入），并且（如果电阻器在电阻器段和下面的半导体材料之间具有场氧化物层），减小响应时间对场氧化物的依赖性 层厚度。 在优选实施例中，电阻器包括在P型半导体衬底中的三层N型半导体材料串联连接的10个多晶硅段（具有将每个槽与分段叠置的段的氧化物层分隔开）。

公开(公告)号：US20100164656A1

公开(公告)日：2010-07-01

申请号：US12719432

申请日：2010-03-08

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H01P1/22

CPC分类号： H03H7/24

摘要： An integrated digitally controlled linear-in-decibels attenuator circuit in which one or more sets of selection switches establish a desired attenuation by selectively connecting the input signal electrode to one or more corresponding resistive ladder networks connected in series, thereby providing a substantially more constant signal attenuation value over a wider frequency bandwidth. With a single resistive ladder network, attenuation control is achieved using a thermometer switching code. With multiple resistive ladder networks, coarse and fine attenuation control can be achieved using thermometer and bubble switching codes, respectively.

摘要翻译： 一种集成的数字控制线性分贝衰减器电路，其中一组或多组选择开关通过选择性地将输入信号电极连接到串联连接的一个或多个相应的电阻梯形网络来建立期望的衰减，从而提供基本上更恒定的信号 在更宽的频率带宽上的衰减值。 使用单个电阻梯形网络，使用温度计切换代码实现衰减控制。 使用多个电阻梯形网络，可以使用温度计和气泡切换代码分别实现粗略和精细的衰减控制。

公开(公告)号：US07675380B2

公开(公告)日：2010-03-09

申请号：US11876482

申请日：2007-10-22

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H03G3/20

CPC分类号： H03H7/24

摘要： An integrated digitally controlled linear-in-decibels attenuator circuit in which one or more sets of selection switches establish a desired attenuation by selectively connecting the input signal electrode to one or more corresponding resistive ladder networks connected in series, thereby providing a substantially more constant signal attenuation value over a wider frequency bandwidth. With a single resistive ladder network, attenuation control is achieved using a thermometer switching code. With multiple resistive ladder networks, coarse and fine attenuation control can be achieved using thermometer and bubble switching codes, respectively.

摘要翻译： 一种集成的数字控制线性分贝衰减器电路，其中一组或多组选择开关通过选择性地将输入信号电极连接到串联连接的一个或多个相应的电阻梯形网络来建立期望的衰减，从而提供基本上更恒定的信号 在更宽的频率带宽上的衰减值。 使用单个电阻梯形网络，使用温度计切换代码实现衰减控制。 使用多个电阻梯形网络，可以使用温度计和气泡切换代码分别实现粗略和精细的衰减控制。

公开(公告)号：US07148757B2

公开(公告)日：2006-12-12

申请号：US11060982

申请日：2005-02-18

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H03L7/00

CPC分类号： H03L7/18 ,  H03L7/0898

摘要： A charge pump-based PLL dynamically controls loop gain in response to the frequency of an input signal. The loop gain is dynamically adjusted by varying the bias current of the charge pump circuit of the PLL. The bias current is varied in response to the voltage of a loop filter that is coupled to the output of the charge pump circuit. A voltage-to-current converter (“V/I converter”) converts the voltage of the loop filter to a current. The current is mirrored to a dynamic bias generator. The dynamic bias generator comprises a sample-and-hold circuit that is used to sample the mirrored current when the charge pump circuit is temporarily switched off. The sampled current level is used to adjust the level of the bias current of the charge pump circuit. The switching the charge pump off minimizes the disturbance of the loop filter voltage by the charge pump.

摘要翻译： 基于电荷泵的PLL响应于输入信号的频率动态地控制环路增益。 通过改变PLL的电荷泵电路的偏置电流来动态地调节环路增益。 偏置电流响应于耦合到电荷泵电路的输出的环路滤波器的电压而变化。 电压 - 电流转换器（“V / I转换器”）将环路滤波器的电压转换为电流。 电流反映到动态偏置发生器。 动态偏置发生器包括一个采样保持电路，用于在电荷泵电路暂时关断时采样镜像电流。 采样电流电平用于调整电荷泵电路的偏置电流电平。 关闭电荷泵可以最大限度地减少电荷泵对环路滤波器电压的干扰。

公开(公告)号：US07084670B1

公开(公告)日：2006-08-01

申请号：US10881879

申请日：2004-06-30

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： G01R25/00

CPC分类号： H03L7/0891 ,  G01R23/005 ,  G01R25/005 ,  G01R25/04

摘要： A gated phase-frequency detector circuit includes a phase-frequency detector and a multiplexer circuit. The phase-frequency detector is arranged to provide UP and DOWN signals responsive to a reference clock signal and a feedback signal. Further, the phase-frequency detector includes a first flip-flop that provides the UP signal, a second flip-flop that provides the DOWN signal, and a clear logic circuit. One input of the multiplexer circuit is coupled to the output of the first flip-flop, another input of the multiplexer circuit is arranged to receive a logic high signal, and an output of the multiplexer circuit is coupled to the D input of the first flip-flop. The multiplexer circuit is arranged to multiplex the logic high signal and the UP signal responsive to a reference gate signal. If the reference gate signal corresponds to an active level, logic level of the UP signal does not change.

摘要翻译： 门控相位频率检测器电路包括相位频率检测器和多路复用器电路。 相位频率检测器被布置成响应于参考时钟信号和反馈信号而提供UP和DOWN信号。 此外，相位频率检测器包括提供UP信号的第一触发器，提供DOWN信号的第二触发器和清零逻辑电路。 多路复用器电路的一个输入耦合到第一触发器的输出，多路复用器电路的另一个输入被设置为接收逻辑高信号，多路复用器电路的输出耦合到第一触发器的D输入端 -flop。 复用器电路被布置成响应于参考门信号复用逻辑高电平信号和UP信号。 如果参考门信号对应于有效电平，则UP信号的逻辑电平不变。

公开(公告)号：US08076995B2

公开(公告)日：2011-12-13

申请号：US12719432

申请日：2010-03-08

申请人： Hon Kin Chiu

发明人： Hon Kin Chiu

IPC分类号： H03G3/20

CPC分类号： H03H7/24

摘要： An integrated digitally controlled linear-in-decibels attenuator circuit in which one or more sets of selection switches establish a desired attenuation by selectively connecting the input signal electrode to one or more corresponding resistive ladder networks connected in series, thereby providing a substantially more constant signal attenuation value over a wider frequency bandwidth. With a single resistive ladder network, attenuation control is achieved using a thermometer switching code. With multiple resistive ladder networks, coarse and fine attenuation control can be achieved using thermometer and bubble switching codes, respectively.

摘要翻译： 一种集成的数字控制线性分贝衰减器电路，其中一组或多组选择开关通过选择性地将输入信号电极连接到串联连接的一个或多个相应的电阻梯形网络来建立期望的衰减，从而提供基本上更恒定的信号 在更宽的频率带宽上的衰减值。 使用单个电阻梯形网络，使用温度计切换代码实现衰减控制。 使用多个电阻梯形网络，可以使用温度计和气泡切换代码分别实现粗略和精细的衰减控制。

公开(公告)号：US07277135B1

公开(公告)日：2007-10-02

申请号：US10897522

申请日：2004-07-23

申请人： Peyman Hojabri ,  Hon Kin Chiu ,  Robert Eddy ,  Leonard Stencel ,  Wayne Harlan

发明人： Peyman Hojabri ,  Hon Kin Chiu ,  Robert Eddy ,  Leonard Stencel ,  Wayne Harlan

IPC分类号： H04N5/57

CPC分类号： H04N5/59 ,  H04N21/4318

摘要： Video signal control circuitry for use in a video display system in which a variation in a brightness level of a video display signal causes a corresponding variation in a beam current signal, wherein such video signal control circuitry maintains a controllable video display signal brightness level at a substantially constant average value notwithstanding a variation in the incoming video signal brightness level.

摘要翻译： 用于视频显示系统的视频信号控制电路，其中视频显示信号的亮度水平的变化引起了束电流信号的相应变化，其中这种视频信号控制电路在一个视频信号控制电路中维持可控的视频显示信号亮度水平 即使输入的视频信号亮度水平发生变化，基本上恒定的平均值。