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公开(公告)号:US06937247B2
公开(公告)日:2005-08-30
申请号:US10947773
申请日:2004-09-22
Applicant: Eric Yean-Liu Chang , Hsiang-I Huang
Inventor: Eric Yean-Liu Chang , Hsiang-I Huang
CPC classification number: G11C8/12
Abstract: A memory control device and a method of controlling memory transfer. The memory control device has a command decoding device, a compare logic device, a decision device, a frame buffer decode device, a frame buffer range device and a command routing device. The frame buffer range device is used to determine if the access address pointed to a graphic memory. The command-decoding device and the compare logic device are used to determine if the access address points to a memory bank range having an error-check-correction function. The decision device is used to determine if the access address points to a memory bank range having error-check-correction function but outside the graphic memory range. If the access address points to a memory bank range having error-check-correction function but outside the graphic memory range, a memory access command with error checking and correction of data is executed.
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公开(公告)号:US06874117B2
公开(公告)日:2005-03-29
申请号:US10068251
申请日:2002-02-06
Applicant: Eric Yean-Liu Chang , Hsiang-I Huang
Inventor: Eric Yean-Liu Chang , Hsiang-I Huang
CPC classification number: G11C8/12
Abstract: A memory control device and a method of controlling memory transfer. The memory control device has a command decoding device, a compare logic device, a decision device, a frame buffer decode device, a frame buffer range device and a command routing device. The frame buffer range device is used to determine if the access address pointed to a graphic memory. The command-decoding device and the compare logic device are used to determine if the access address points to a memory bank range having an error-check-correction function. The decision device is used to determine if the access address points to a memory bank range having error-check-correction function but outside the graphic memory range. If the access address points to a memory bank range having error-check-correction function but outside the graphic memory range, a memory access command with error checking and correction of data is executed.
Abstract translation: 一种存储器控制装置和一种控制存储器传送的方法。 存储器控制装置具有命令解码装置,比较逻辑装置,判定装置,帧缓冲器解码装置,帧缓冲器范围装置和命令路由装置。 帧缓冲区范围设备用于确定访问地址是否指向图形存储器。 命令解码装置和比较逻辑装置用于确定访问地址是否指向具有错误检查校正功能的存储体范围。 判定装置用于确定访问地址是否指向具有错误检查校正功能但在图形存储器范围之外的存储体范围。 如果访问地址指向具有错误检查校正功能但在图形存储器范围之外的存储体范围,则执行具有错误检查和数据校正的存储器访问命令。
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