公开(公告)号：US20120076508A1

公开(公告)日：2012-03-29

申请号：US12890150

申请日：2010-09-24

申请人： Amir Mezer ,  Ehud Shoor

发明人： Amir Mezer ,  Ehud Shoor

IPC分类号： H04B10/06

CPC分类号： H04B10/697

摘要： Jitter reduction of electrical signals from limiting optical modules is described. In one example, a process includes receiving an amplitude limited electrical signal that has been converted from an optical signal, applying a filter to the received electrical signal, measuring an indication of jitter of the filtered signal, and selecting parameters of the linear filter based on the measured indication.

摘要翻译： 描述了限制光模块的电信号抖动减少。 在一个示例中，一个过程包括接收已经从光信号转换的限幅电信号，向所接收的电信号施加滤波器，测量滤波信号的抖动指示，以及基于 测量指示。

公开(公告)号：US08077642B2

公开(公告)日：2011-12-13

申请号：US11966216

申请日：2007-12-28

申请人： Ehud Shoor

发明人： Ehud Shoor

IPC分类号： H04B3/20 ,  H04M9/08

CPC分类号： H04B3/23

摘要： A method includes transmitting a first signal over a network from a first communication link to a second communication link. The method further includes receiving a second signal with the first communication link from the second communication link. The method further includes canceling signal echo from the first signal present in the second signal with a digital echo canceller. The method further includes providing correction data from a memory array to the digital echo canceller during the cancellation of the signal echo. An associated apparatus is also disclosed.

摘要翻译： 一种方法包括通过网络从第一通信链路向第二通信链路发送第一信号。 该方法还包括从第二通信链路接收具有第一通信链路的第二信号。 该方法还包括用数字回声消除器从第二信号中存在的第一信号中消除信号回波。 该方法还包括在消除信号回波期间将校正数据从存储器阵列提供给数字回声消除器。 还公开了一种相关装置。

公开(公告)号：US20090168672A1

公开(公告)日：2009-07-02

申请号：US11966216

申请日：2007-12-28

申请人： Ehud Shoor

发明人： Ehud Shoor

IPC分类号： H04B3/20

CPC分类号： H04B3/23

摘要： A method includes transmitting a first signal over a network from a first communication link to a second communication link. The method further includes receiving a second signal with the first communication link from the second communication link. The method further includes canceling signal echo from the first signal present in the second signal with a digital echo canceller. The method further includes providing correction data from a memory array to the digital echo canceller during the cancellation of the signal echo. An associated apparatus is also disclosed.

摘要翻译： 一种方法包括通过网络从第一通信链路向第二通信链路发送第一信号。 该方法还包括从第二通信链路接收具有第一通信链路的第二信号。 该方法还包括用数字回声消除器从第二信号中存在的第一信号中消除信号回波。 该方法还包括在消除信号回波期间将校正数据从存储器阵列提供给数字回声消除器。 还公开了一种相关装置。

公开(公告)号：US08989588B2

公开(公告)日：2015-03-24

申请号：US13747310

申请日：2013-01-22

申请人： Gil Afriat ,  Lior Horwitz ,  Dror Lazar ,  Assaf Issachar ,  Alexander Pogrebinsky ,  Adee O. Ran ,  Ehud Shoor ,  Roi Bar ,  Rushdy A. Saba

发明人： Gil Afriat ,  Lior Horwitz ,  Dror Lazar ,  Assaf Issachar ,  Alexander Pogrebinsky ,  Adee O. Ran ,  Ehud Shoor ,  Roi Bar ,  Rushdy A. Saba

IPC分类号： H04B10/00 ,  H04B10/69 ,  H04B10/60 ,  H01R13/518

CPC分类号： H04B10/69 ,  H01R13/518 ,  H04B10/60

摘要： An optical transceiver includes an optical IC coupled to a processor IC. For transmit, the optical IC can be understood as a transmitter IC including a laser device or array. For receive, the optical IC can be understood as a receiver IC including a photodetector/photodiode device or array. For a transmitter IC, the processor IC includes a driver for a laser of the transmitter IC. The driver includes an equalizer that applies high frequency gain to a signal transmitted with the laser device. For a receiver IC, the processor IC includes a front end circuit to interface with a photodetector of the receiver IC. The front end circuit includes an equalizer that applies high frequency gain to a signal received by the receiver IC. The driver can be configurable to receive a laser having either orientation: ground termination or supply termination.

摘要翻译： 光收发器包括耦合到处理器IC的光IC。 为了发射，光IC可以被理解为包括激光装置或阵列的发射器IC。 为了接收，光IC可以理解为包括光电检测器/光电二极管器件或阵列的接收器IC。 对于发射器IC，处理器IC包括用于发射器IC的激光器的驱动器。 驱动器包括对激光装置发送的信号施加高频增益的均衡器。 对于接收器IC，处理器IC包括与接收器IC的光电检测器接口的前端电路。 前端电路包括对由接收器IC接收的信号施加高频增益的均衡器。 驱动器可以配置为接收具有方向：接地端接或电源端接的激光器。

公开(公告)号：US08314724B2

公开(公告)日：2012-11-20

申请号：US12969249

申请日：2010-12-15

申请人： Ehud Shoor ,  Dror Lazar ,  Assaf Benhamou

发明人： Ehud Shoor ,  Dror Lazar ,  Assaf Benhamou

IPC分类号： H03M9/00

摘要： In one embodiment, the present invention includes a de-serializer to receive serial data at a first rate and to output a parallel data frame corresponding to the serial data aligned to a frame alignment boundary in response to a phase control signal received from a feedback loop coupled between the de-serializer and a receiver logic coupled to an output of the de-serializer. Other embodiments are described and claimed.

公开(公告)号：US20080240412A1

公开(公告)日：2008-10-02

申请号：US11731232

申请日：2007-03-30

申请人： Amir Mezer ,  Adee Ran ,  Ehud Shoor ,  Harry Birenboim ,  Yaniv Hadar ,  Assaf Benhamou

发明人： Amir Mezer ,  Adee Ran ,  Ehud Shoor ,  Harry Birenboim ,  Yaniv Hadar ,  Assaf Benhamou

IPC分类号： H04M9/08

CPC分类号： H04B3/235 ,  H04B3/52

摘要： In one embodiment, the present invention includes an apparatus having an automatic gain control (AGC) stage to receive an input signal from a communication channel physical medium, a first local gain stage coupled to an output of the AGC stage, an equalizer coupled to an output of the first local gain stage, an echo canceler to receive local data to be transmitted along the communication channel physical medium, and a second local gain stage coupled to an output of the echo canceler. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括具有自动增益控制（AGC）级的装置，用于从通信信道物理介质接收输入信号，耦合到AGC级的输出的第一局部增益级，耦合到 第一本地增益级的输出，回波消除器，用于接收沿着通信信道物理介质发送的本地数据，以及耦合到回波消除器的输出的第二局部增益级。 描述和要求保护其他实施例。

公开(公告)号：US20070018703A1

公开(公告)日：2007-01-25

申请号：US11173145

申请日：2005-06-30

申请人： Ofir Kanter ,  Eran Peleg ,  Ehud Shoor ,  Eli Sterin

发明人： Ofir Kanter ,  Eran Peleg ,  Ehud Shoor ,  Eli Sterin

IPC分类号： H03L7/00

CPC分类号： H04L1/205

摘要： Apparatus, systems, methods, and articles may operate to move an output phase of a clock phase adjustment device associated with a master clock through a plurality of phase shifts relative to a phase of the master clock. A data integrity test may be performed on a serial data receive circuit clocked using an output phase of the clock phase adjustment device following each one of the plurality of phase shifts.

摘要翻译： 装置，系统，方法和物品可以操作以通过相对于主时钟的相位的多个相移来移动与主时钟相关联的时钟相位调整装置的输出相位。 可以在使用在多个相移中的每一个之后的时钟相位调整装置的输出相位定时的串行数据接收电路上执行数据完整性测试。

公开(公告)号：US20130241751A1

公开(公告)日：2013-09-19

申请号：US13781039

申请日：2013-02-28

申请人： Ehud SHOOR ,  Dror LAZAR ,  Assaf BENHAMOU

发明人： Ehud SHOOR ,  Dror LAZAR ,  Assaf BENHAMOU

IPC分类号： H03M9/00

CPC分类号： H03M9/00 ,  H04J3/0608

摘要： In one embodiment, the present invention includes a de-serializer to receive serial data at a first rate and to output a parallel data frame corresponding to the serial data aligned to a frame alignment boundary in response to a phase control signal received from a feedback loop coupled between the de-serializer and a receiver logic coupled to an output of the de-serializer. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括解串器，用于以第一速率接收串行数据，并且响应于从反馈回路接收的相位控制信号，输出与对准边界对准的串行数据的并行数据帧 耦合在解串器和耦合到解串器的输出的接收器逻辑之间。 描述和要求保护其他实施例。

公开(公告)号：US08130939B2

公开(公告)日：2012-03-06

申请号：US11731232

申请日：2007-03-30

申请人： Amir Mezer ,  Adee Ran ,  Ehud Shoor ,  Harry Birenboim ,  Yaniv Hadar ,  Assaf Benhamou

发明人： Amir Mezer ,  Adee Ran ,  Ehud Shoor ,  Harry Birenboim ,  Yaniv Hadar ,  Assaf Benhamou

IPC分类号： H04M9/00

CPC分类号： H04B3/235 ,  H04B3/52

摘要： In one embodiment, the present invention includes an apparatus having an automatic gain control (AGC) stage to receive an input signal from a communication channel physical medium, a first local gain stage coupled to an output of the AGC stage, an equalizer coupled to an output of the first local gain stage, an echo canceller to receive local data to be transmitted along the communication channel physical medium, and a second local gain stage coupled to an output of the echo canceller. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括具有自动增益控制（AGC）级的装置，用于从通信信道物理介质接收输入信号，耦合到AGC级的输出的第一局部增益级，耦合到 第一本地增益级的输出，用于接收沿着通信信道物理介质发送的本地数据的回波消除器，以及耦合到回声消除器的输出的第二局部增益级。 描述和要求保护其他实施例。

公开(公告)号：US08102960B2

公开(公告)日：2012-01-24

申请号：US12079642

申请日：2008-03-28

申请人： Adee Ran ,  Ehud Shoor ,  Amir Mezer

发明人： Adee Ran ,  Ehud Shoor ,  Amir Mezer

IPC分类号： H03D3/24

CPC分类号： H04L25/03057 ,  H04L7/0004

摘要： A method and apparatus to improve adaptation speed of a digital receiver is presented. The receiver includes an equalizer to initiate adaptation to a transmission channel responsive to a first control signal, a slicer coupled to the equalizer to generate symbol decisions based at least in part on an equalized digital signal, logic to receive the symbol decisions and generate a selection signal when a lock onto a training sequence of the symbol decisions occurs, first and second phase detectors to detect phase errors of the equalized digital signal and an incoming digital signal, respectively, and a clock generator to generate a clock signal responsive to one of the first and second phase errors.

摘要翻译： 提出了一种提高数字接收机适应速度的方法和装置。 接收机包括均衡器以响应于第一控制信号来发起对传输信道的适配，限幅器，耦合到均衡器以至少部分地基于均衡的数字信号产生符号决定，以接收符号决定并产生选择 当发生对符号判定的训练序列的锁定时的信号，分别检测均衡数字信号和输入数字信号的相位误差的第一和第二相位检测器以及时钟发生器，以响应于 第一和第二相误差。