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公开(公告)号:US20250072303A1
公开(公告)日:2025-02-27
申请号:US18721035
申请日:2022-12-22
Inventor: Jean-Baptiste DORY , Gabriel MOLAS , Jean-François NODIN , Anthonin VERDY
Abstract: An assembly includes at least two selectors arranged electrically in parallel to one another and each being electrically connected in series to a memory layer forming at least two distinct non-volatile resistive memories each associated, respectively, with one of the two selectors, the assembly including two upper electrodes which both extend over the memory layer and which are electrically insulated from each other, one of the selectors extending against a lateral surface of the first upper electrode and another of the selectors extending against a lateral surface of the second upper electrode.
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公开(公告)号:US12234144B2
公开(公告)日:2025-02-25
申请号:US17637040
申请日:2020-08-18
Inventor: Thierry Salvetat , Bruno Ghyselen , Lamine Benaissa , Caroline Coutier , Gweltaz Gaudin
Abstract: A method for sealing cavities using membranes, the method including a) forming cavities arranged in a matrix, of a depth p, a characteristic dimension a, and spaced apart by a spacing b; and b) forming membranes, sealing the cavities, by transferring a sealing film. The method further includes a step a1), executed before step b), of forming a first contour on the front face and/or on the sealing face, the first contour comprising a first trench having a width L and a first depth p1, the formation of the first contour being executed such that after step b) the cavities are circumscribed by the first contour, said first contour being at a distance G from the cavities between one-fifth of b and five b.
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公开(公告)号:US12228767B2
公开(公告)日:2025-02-18
申请号:US17805760
申请日:2022-06-07
Inventor: Olivier Castany
Abstract: An integrated optical component, including a transparent pad arranged on the upper face of the basic optical component, the transparent pad including a plane mirror at its upper face, and the basic optical component including a convergent mirror at its upper face, the plane and convergent mirrors being arranged such that the light beam is propagated between the internal light gate and the external light gate by passing through the transparent pad by reflection on the plane mirror and by reflection on the convergent mirror.
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公开(公告)号:US12225308B2
公开(公告)日:2025-02-11
申请号:US18051244
申请日:2022-10-31
Inventor: Jean-Alain Nicolas
IPC: H04N25/75
Abstract: Imager readout circuit comprising: an active reset stage of the integration capacitor equipped with a first current amplifier, a buffered direct injection bias stage of the photodetector equipped with transistors forming a second current amplifier, a switching circuit comprising a coupling stage integrated in the readout circuit, the switching circuit being controlled by control signals and being configured to: during a reset phase of the integration capacitor corresponding to a first state of said control signals: couple said first current source to the integration capacitor and activate the first current amplifier while uncoupling said second current source of the photodetector and deactivating the second amplifier, during an integration phase of a current from the photodiode and corresponding to a second state of said control signals, couple said second current source to the photodetector and activate the second current amplifier while uncoupling said first current source of the integration capacitor and deactivating the first amplifier.
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公开(公告)号:US12217877B2
公开(公告)日:2025-02-04
申请号:US17901911
申请日:2022-09-02
Inventor: Alessandro Pantano , Laurent Brissonneau , Jérôme Pouvreau
Abstract: A nuclear reactor incorporates a fully passive decay heat removal system with a modular cold source. The decay heat removal system is configured to remove heat passively, via the outside of a primary vessel included in the nuclear reactor. The cold source has a plurality of modules grouped together in assemblies. Each module is filled with a phase change material. Each module is cooled by a monotube heat exchanger. The decay heat removal system includes a hot collector and a cold collector to ensure the distribution of a heat transfer fluid in the plurality of monotube heat exchangers.
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公开(公告)号:US12205020B2
公开(公告)日:2025-01-21
申请号:US17224696
申请日:2021-04-07
Inventor: Thomas Dalgaty , Niccolo Castellani , Elisa Vianello
Abstract: A Bayesian neural network including an input layer, and, an output layer, and, possibly, one or more hidden layer(s). Each neuron of a layer is connected at its input with a plurality of synapses, the synapses of the plurality being implemented as a RRAM array constituted of cells, each column of the array being associated with a synapse and each row of the array being associated with an instance of the set of synaptic coefficients, the cells of a row of the RRAM being programmed during a SET operation with respective programming current intensities, the programming intensity of a cell being derived from the median value of a Gaussian component obtained by GMM decomposition into Gaussian components of the marginal posterior probability of the corresponding synaptic coefficient, once the BNN model has been trained on a training dataset.
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公开(公告)号:US20250019789A1
公开(公告)日:2025-01-16
申请号:US18713458
申请日:2022-11-30
Inventor: Denis SORNIN
Abstract: A method for manufacturing a double-layer heat-exchange wall including first and second metal layers includes the following successive steps: (i) providing a first metal sheet forming the first layer, a second metal sheet forming the second layer, and a leaf of iron Fe0 having a thickness of between 10 μm and 100 μm; (ii) assembling the first and second metal sheets and the leaf of iron Fe0, the leaf interposed between the first and second metal sheets; (iii) mechanical pressing of the assembly at a minimum pressure of 1 MPa; (iv) peripheral welding of the pressed assembly; and (v) heat treatment of the welded assembly, the heat treatment being implemented by hot isostatic pressing conducted at a temperature of between 800° C. and 1200° C., at a pressure of between 108 Pa and 2.108 Pa, for a period of between 1 hour and 3 hours.
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公开(公告)号:US20250015204A1
公开(公告)日:2025-01-09
申请号:US18712345
申请日:2022-11-21
Inventor: Amandine BOULANGER , Dick HESLINGA , Jean RODIERE , Rémi DE BETTIGNIES , Eric COQUELLE , Patrick LELIEVRE
IPC: H01L31/02 , H01L31/044 , H01L31/048 , H01L31/18 , H02S10/40 , H02S20/21 , H02S20/26
Abstract: The invention relates to a functional device (100) comprising a multilayer stack comprising, in succession: a first protective film (101), placed on a front side of said device (100), an encapsulating assembly (107), a second protective film (105), placed on the back side of the device, at least one electrically or optically active element (110) embedded in the encapsulating assembly, and an electrical connecting element (160) directly connected to said electrically or optically active element and suitable for transporting electricity from or to said electrically or optically active element, one end (162) of said electrical connecting element exiting directly from said functional device.
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公开(公告)号:US20250014905A1
公开(公告)日:2025-01-09
申请号:US18706267
申请日:2022-10-20
Inventor: Ludovic DUPRE , Hélène FOURNIER
IPC: H01L21/3065 , H01L21/308 , H01L21/311
Abstract: A surface treatment method includes providing a substrate with a surface having areas of selective epitaxy of a first material and masses of matter of the first material; forming a protection layer, produced in a second material, on the surface of the substrate; and forming a flattening layer on the protection layer. Areas of the flattening layer facing the masses of matter and top areas of the protection layer are removed so as to expose the masses of matter. Lateral areas of the protection layer are etched by a selective wet chemical etching. The flattening layer is removed; the masses of matter are etched, the protection layer forming an etch mask; and protection layer is removed.
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公开(公告)号:US12191805B2
公开(公告)日:2025-01-07
申请号:US17620504
申请日:2020-06-09
Inventor: Julien Eymard , Felix Gerenton , Samuel Harrison , Maria-Delfina Munoz
IPC: H02S50/10
Abstract: A method for electrically characterising a cut photovoltaic cell, includes measuring the feature I-V of the uncut cell; cutting the cell into a plurality of sub-cells; measuring the feature I-V of each sub-cell not electrically connected to the other sub-cells; measuring the feature I-V of a set comprising all the sub-cells connected in parallel; determining, on the basis of the measured features I-V, performance parameters of the uncut cell, of each sub-set and of the set; computing, for each sub-cell, the difference between the value of the performance parameters of the sub-cell and that of the performance parameter of the uncut cell; and computing the difference between the value of the performance parameter of the set and the value of the performance parameter of the uncut cell.
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