公开(公告)号：US06916718B2

公开(公告)日：2005-07-12

申请号：US10613606

申请日：2003-07-03

Applicant: Ying-Lin Chen ,  Chiang-Lang Yen ,  Ling-Sung Wang

Inventor： Ying-Lin Chen ,  Chiang-Lang Yen ,  Ling-Sung Wang

IPC: H01L21/311 ,  H01L21/336

CPC classification number: H01L29/665 ,  H01L21/31116 ,  H01L29/6656

Abstract: A method is provided for the removal of liner oxide from the surface of a gate electrode during the creation of the gate electrode. A layer of gate oxide is formed over the surface of a substrate, a layer of gate electrode is deposited over the layer of gate oxide. The gate electrode is deposited, gate spacers are formed over the liner oxide, exposing surfaces of the liner oxide. The created structure is nitrided by a plasma stream containing N2/H2, reducing the etch rate of the exposed liner oxide. The liner oxide is then removed by applying a wet etch, contact regions to the gate electrode are salicided.

Abstract translation: 提供了一种在栅极电极生成期间从栅电极的表面去除衬垫氧化物的方法。 在衬底的表面上形成栅极氧化物层，栅电极层沉积在栅极氧化物层上。 沉积栅电极，在衬垫氧化物上方形成栅极隔离物，暴露衬里氧化物的表面。 所产生的结构被含有N 2 / H 2 O 2的等离子体流渗氮，降低了暴露的衬垫氧化物的蚀刻速率。 然后通过施加湿蚀刻来除去衬里氧化物，对栅电极的接触区域进行浸蚀。

公开(公告)号：US06610571B1

公开(公告)日：2003-08-26

申请号：US10068929

申请日：2002-02-07

Applicant: Ying-Lin Chen ,  Chiang-Lang Yen ,  Ling-Sung Wang

Inventor： Ying-Lin Chen ,  Chiang-Lang Yen ,  Ling-Sung Wang

IPC: H01L21336

CPC classification number: H01L29/665 ,  H01L21/31116 ,  H01L29/6656

Abstract: A new method is provided for the removal of liner oxide from the surface of a gate electrode during the creation of the gate electrode. A layer of gate oxide is formed over the surface of a substrate, a layer of gate electrode such as polyimide is deposited over the layer of gate oxide. The gate electrode and the layer of gate oxide are patterned. A layer of liner oxide is deposited, gate spacers are formed over the liner oxide, exposing surfaces of the liner oxide. The created structure is nitrided by a plasma stream containing N2/H2, reducing the etch rate of the exposed liner oxide. The liner oxide is then removed by applying a wet etch, contact regions to the gate electrode are salicided.

Abstract translation: 提供了一种新的方法，用于在栅电极生成期间从栅电极的表面去除衬垫氧化物。 在衬底的表面上形成栅极氧化物层，在栅极氧化物层上沉积诸如聚酰亚胺的栅电极层。 栅极电极和栅极氧化物层被图案化。 沉积一层衬垫氧化物，在衬垫氧化物上形成栅极间隔物，暴露衬里氧化物的表面。 所产生的结构被含有N 2 / H 2的等离子体流渗氮，降低了暴露的衬垫氧化物的蚀刻速率。 然后通过施加湿蚀刻来除去衬里氧化物，对栅电极的接触区域进行浸蚀。