摘要:
The invention provides an apparatus and method for transparently transporting four plesiochronous Gigabit Ethernet, Fibre Channel or other packet-based data signals over a network. Multiple plesiochronous Gigabit Ethernet data streams are aggregated onto an independent clock source at an ingress circuit through the use of transparent IDLE character insertion. The independent clock is selected such that the output data rate is greater than the composite input data rate of all the plesiochronous data streams. The signals are encapsulated with forward error correction and mapped to a reciprocal FEC interface prior to transport. An egress circuit at the receiving end recovers the modulated signal and extracts the data stream. Each independent data stream is mapped to a local clock domain via IDLE character insertion or removal. Therefore, the input and output signals are transparent and identical in content.
摘要:
This invention provides an apparatus and method to aggregate individual fibre channel data streams in their native mode and to extend connectivity of fibre channel storage area networks across wide geographical distances over a high-speed data channel with forward error correction
摘要:
This invention provides an apparatus and method to aggregate individual fiber channel data streams in their native mode and to extend connectivity of fiber channel storage area networks across wide geographical distances over a high-speed data channel with forward error correction.