Thin decoupling capacitor for mounting under integrated circuit package
    1.
    发明授权
    Thin decoupling capacitor for mounting under integrated circuit package 失效
    用于安装在集成电路封装下的薄去耦电容器

    公开(公告)号:US5034850A

    公开(公告)日:1991-07-23

    申请号:US479095

    申请日:1990-02-12

    IPC分类号: H01G2/06 H01G4/35 H05K1/02

    摘要: A rugged, highly reliable, leadless decoupling capacitor is provided which may be positioned between a circuit board and an integrated circuit package including, for example, a leaded surface mounted IC package or Pin Grid Array package. This decoupling capacitor is comprised of a rugged ceramic or like substrate having printed or otherwise applied thereon a very thin high capacitance layer made by thick or thin film processes which is sandwiched between two thin electrode layers. Conductive castellations extend from the electrode layers along the surface of the ceramic substrate for connection to the circuit board. Preferably, an electrically insulative protective layer encapsulates the capacitor. The dielectric layer preferably comprises a high dielectric glass/ceramic dielectric paste or dielectric sol-gel layer. The overall thickness of the decoupling capacitor may be less than 0.020 inch.

    摘要翻译: 提供坚固,高度可靠的无引线去耦电容器,其可以位于电路板和集成电路封装之间,该集成电路封装包括例如引线表面安装的IC封装或引脚格栅阵列封装。 该去耦电容器由具有印刷或其它方式施加在其上的由厚或薄膜工艺制成的非常薄的高电容层的坚固的陶瓷或类似衬底组成,其夹在两个薄电极层之间。 导电的cast ell从电极层沿着陶瓷基板的表面延伸以连接到电路板。 优选地,电绝缘保护层封装电容器。 电介质层优选包括高电介质玻璃/陶瓷电介质浆料或电介质溶胶 - 凝胶层。 去耦电容器的总厚度可以小于0.020英寸。