Receiving apparatus, method of compensating for waveform degradation of received signal, apparatus and method for detecting waveform degradation, and apparatus and method for measuring waveform
    1.
    发明授权
    Receiving apparatus, method of compensating for waveform degradation of received signal, apparatus and method for detecting waveform degradation, and apparatus and method for measuring waveform 失效
    接收装置,补偿接收信号的波形劣化的方法,用于检测波形劣化的装置和方法,以及用于测量波形的装置和方法

    公开(公告)号:US06694273B2

    公开(公告)日:2004-02-17

    申请号:US09933769

    申请日:2001-08-22

    IPC分类号: G06F500

    CPC分类号: H04B10/2513 H04B2210/252

    摘要: In a receiving apparatus, there are included a compensation characteristic variable type waveform degradation compensating unit capable of compensating for waveform degradation of a received signal stemming from a transmission line, a received waveform measuring unit for measuring waveform data on the received signal (which will be referred to hereinafter as “received waveform data), and a control unit for controlling a compensation characteristic of the waveform degradation compensating unit to minimize a difference between frequency data on the received signal, obtained by converting the received waveform data acquired by the received waveform measuring unit into a frequency domain, and frequency data on a reference waveform free from waveform degradation. With this configuration, certain compensation for the waveform degradation of the received signal stemming from chromatic dispersion or the like becomes feasible without using a dispersion compensation fiber.

    摘要翻译: 在接收装置中,包括能够补偿来自传输线的接收信号的波形劣化的补偿特性可变型波形劣化补偿单元,接收波形测量单元,用于测量接收信号的波形数据(将是 以下称为“接收波形数据”)以及控制单元,用于控制波形劣化补偿单元的补偿特性,以最小化通过将接收到的波形测量获得的接收波形数据进行转换而获得的接收信号的频率数据之间的差异 单位变为频域,并且在没有波形劣化的参考波形上的频率数据,通过这种配置,在不使用色散补偿光纤的情况下,可以对由色散等产生的接收信号的波形劣化进行一定的补偿。

    Clock signal detection circuit
    2.
    发明授权
    Clock signal detection circuit 失效
    时钟信号检测电路

    公开(公告)号:US6065129A

    公开(公告)日:2000-05-16

    申请号:US89508

    申请日:1998-06-03

    CPC分类号: H03K5/19

    摘要: A clock signal detection circuit includes a diode to which a clock signal is applied as an input. If a voltage VD IN on the anode side of the diode is greater than a voltage VD OUT on the cathode side, the clock signal is fed into a transmission line and arrives at a reflecting load upon elapse of a prescribed delay time. When the voltage VD IN on the anode side of the diode becomes smaller than the voltage VD OUT on the cathode side, the clock signal is reflected by the reflecting load and returns to the cathode of the diode through the transmission line. This introduction and reflection of the clock signal is repeated at the clock signal period so that the amplitude on the output side of the diode is enlarged, thereby making it possible to obtain, from an averaging circuit, a clock detection voltage substantially equal to the amplitude value of the clock signal.

    摘要翻译: 时钟信号检测电路包括施加时钟信号作为输入的二极管。 如果二极管的阳极侧的电压VD IN大于阴极侧的电压VD OUT,则时钟信号被馈送到传输线,并且在经过规定的延迟时间后到达反射负载。 当二极管的阳极侧的电压VD IN小于阴极侧的电压VD OUT时,时钟信号被反射负载反射,并通过传输线返回到二极管的阴极。 时钟信号的引入和反射在时钟信号周期被重复,使得二极管的输出侧的振幅被放大,从而可以从平均电路获得基本上等于振幅的时钟检测电压 时钟信号的值。

    Bias circuit for a photodetector, and an optical receiver
    3.
    发明授权
    Bias circuit for a photodetector, and an optical receiver 有权
    用于光电检测器的偏置电路和光接收器

    公开(公告)号:US06707024B2

    公开(公告)日:2004-03-16

    申请号:US10010565

    申请日:2001-12-06

    IPC分类号: H01J4014

    摘要: A bias circuit for a photodetector by the present invention provides a bias voltage to the photodetector that performs electric current amplification according to the bias voltage supplied, and is characterized by comprising a power node and an auto-bias circuit that changes a time constant of the bias circuit for the photodetector according to an optical power received by the photodetector, the auto-bias circuit being connected between the power node and the photodetector, thereby reliability of operation of the photodetector is enhanced.

    摘要翻译: 本发明的光电检测器的偏置电路根据所提供的偏置电压向光电检测器提供偏置电压,其特征在于包括功率节点和自偏置电路,其将时间常数 根据由光电检测器接收的光功率的光电检测器的偏置电路,自动偏置电路连接在电源节点和光电检测器之间,从而增强了光电检测器的操作可靠性。

    Optical transmitter, terminal-station apparatus having the optical
transmitter, and optical communication system
    4.
    发明授权
    Optical transmitter, terminal-station apparatus having the optical transmitter, and optical communication system 失效
    光发射机,具有光发射机的终端设备和光通信系统

    公开(公告)号:US6040931A

    公开(公告)日:2000-03-21

    申请号:US859253

    申请日:1997-05-20

    摘要: An optical transmitter, a terminal-station apparatus having the optical transmitter, and an optical communication system employing the terminal-station apparatus. The optical transmitter comprises: a light-source unit for generating an optical signal; a monitor unit for monitoring a parameter depending on the wavelength of the optical signal; a judgment unit for determining as to whether or not the monitored parameter satisfies a predetermined condition; and a shut-off unit for shutting off the optical signal in case the monitored parameter does not satisfy the predetermined condition. By using the optical transmitter, it can be possible to prevent crosstalk from occurring between WDM (Wavelength Division Multiplexing) channels in the optical communication system.

    摘要翻译: 具有光发送机的光发送机,终端装置以及采用终端装置的光通信系统。 光发射机包括:用于产生光信号的光源单元; 监视单元,用于根据所述光信号的波长监视参数; 判断单元,用于确定所监视的参数是否满足预定条件; 以及用于在所监视的参数不满足预定条件的情况下关闭光信号的截止单元。 通过使用光发射机,可以防止在光通信系统中的WDM(波分复用)​​信道之间发生串扰。

    APD bias circuit
    5.
    发明授权
    APD bias circuit 有权
    APD偏置电路

    公开(公告)号:US06643472B1

    公开(公告)日:2003-11-04

    申请号:US09506702

    申请日:2000-02-18

    IPC分类号: H04B1000

    CPC分类号: H04B10/66

    摘要: An APD bias circuit includes an APD, an equalizer amplifier receiving an output signal of the APD, and first, second and third resistors connected in series to the APD to which a bias voltage is applied therethrough. A bias control circuit is connected to a first node between the first and second resistors, and receives a current from the first node so that a voltage of the first node can be maintained at a constant level. A first capacitor is connected between a ground and a second node between the second and third resistors. A second capacitor is connected between the ground and a third node between the third resistor and the APD. A first time constant defined by the second resistor and the first capacitor is greater than a second time constant defined by the third resistor and the second capacitor.

    摘要翻译: APD偏置电路包括APD,接收APD的输出信号的均衡器放大器以及与施加偏置电压的APD串联连接的第一,第二和第三电阻器。 偏置控制电路连接到第一和第二电阻之间的第一节点,并且从第一节点接收电流,使得第一节点的电压可以维持在恒定电平。 第一电容器连接在第二和第三电阻之间的接地和第二节点之间。 第二电容器连接在第三电阻和APD之间的地与第三节点之间。 由第二电阻器和第一电容器限定的第一时间常数大于由第三电阻器和第二电容器限定的第二时间常数。

    Clock extraction circuit
    6.
    发明授权
    Clock extraction circuit 失效
    时钟提取电路

    公开(公告)号:US06188738B1

    公开(公告)日:2001-02-13

    申请号:US09041777

    申请日:1998-03-13

    IPC分类号: H04L700

    CPC分类号: H04B10/66 H04L7/027 H04L7/033

    摘要: Disclosed is a clock extraction circuit for extracting a clock signal which furnishes timing for discriminating a data signal, from the data signal. The clock extraction circuit has a timing extraction unit for extracting the clock signal from the data signal, and a filter, which is provided in front of the timing extraction unit, having an upper limited frequency sufficiently lower than the bit rate of the data. The data signal is input to the timing extraction unit via the filter.

    摘要翻译: 公开了一种时钟提取电路,用于从数据信号中提取提供用于鉴别数据信号的定时的时钟信号。 时钟提取电路具有用于从数据信号中提取时钟信号的定时提取单元和设置在定时提取单元前面的具有足够低于数据比特率的限制频率的上限的滤波器。 数据信号通过滤波器输入到定时提取单元。