公开(公告)号：US12236872B2

公开(公告)日：2025-02-25

申请号：US18183112

申请日：2023-03-13

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Qingjun Lai ,  Yihua Zhu ,  Jinjin Yang ,  Ping An

IPC: G09G3/3233 ,  G09G3/3266

Abstract: Disclosed are a display panel and a display device. The display panel includes a pixel circuit and a light-emitting element, in the pixel circuit, the drive device includes a drive transistor; the reset device includes a first double-gate transistor, and a connection node between the first sub-transistor and the second sub-transistor is a second node. The pixel circuit is connected to a first power supply voltage signal terminal, and is configured to receive a first power supply voltage signal, and the first power supply voltage signal is a constant high level signal; and the pixel circuit includes a first capacitor, a first pole plate of the first capacitor is connected to the first power supply voltage signal terminal, and a second pole plate of the first capacitor is connected to the second node.

公开(公告)号：US12200974B2

公开(公告)日：2025-01-14

申请号：US17451356

申请日：2021-10-19

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Shui He ,  Ping An

IPC: H01L27/32 ,  H01L29/786 ,  H10K59/121 ,  H10K59/126 ,  H10K59/131

Abstract: A display panel and a display device are provided. The display panel includes a base substrate, and one or more first transistors and one or more second transistors over the base substrate. A first transistor of the one or more first transistors includes a first active layer, and the first active layer contains silicon. A second transistor of the one or more second transistors includes a second active layer, and the second active layer contains an oxide semiconductor material. The display panel also includes a shielding layer. The shielding layer is disposed on a side of the first active layer facing away from the base substrate, and is disposed on a side of the second active layer facing away from the base substrate. Along a projection direction perpendicular to the base substrate, the shielding layer fully covers the second active layer.

公开(公告)号：US12175930B2

公开(公告)日：2024-12-24

申请号：US17873466

申请日：2022-07-26

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Jieliang Li ,  Gaojun Huang

IPC: G09G3/3233 ,  G09G3/3266

Abstract: Provided is a display panel. The display panel includes a pixel driving circuit which including a drive transistor, a data write module, a light emission control module, a threshold compensation module and a bias adjustment module. The control terminal of the drive transistor is connected to the first node. The first terminal of the drive transistor is connected to a third node. The second terminal of the drive transistor is connected to a second node. The light emission control module is connected in series with the drive transistor and connected in series with a light-emitting element. The threshold compensation module is connected in series between the control terminal of the drive transistor and the second terminal of the drive transistor. The first terminal of the bias adjustment module is connected to a bias signal terminal and the second terminal is connected to the second terminal of the drive transistor.

公开(公告)号：US20240419038A1

公开(公告)日：2024-12-19

申请号：US18817813

申请日：2024-08-28

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Jie LIN ,  Bingping LIU

IPC: G02F1/1339 ,  G02F1/1362

Abstract: A display panel and a display apparatus are provided. The display panel includes an array substrate; a color film substrate; support pillars; pixel sub-units; and data lines. The support pillars include a primary support pillar and auxiliary support pillars. The primary support pillar and the auxiliary support pillars each include a first support pillar. The pixel sub-units are formed by crossing the scan lines and the data lines. The pixel sub-units each include a thin film transistor and a pixel electrode. The thin film transistor includes a gate, a source and a drain. The scan line is electrically connected to the gate. The data line is electrically connected to the source. The pixel electrode is electrically connected to the drain. The present disclosure can enhance supporting capacity of the display panel.

公开(公告)号：US12158642B2

公开(公告)日：2024-12-03

申请号：US18229460

申请日：2023-08-02

Applicant: Xiamen Tianma Micro-Electronics Co.,Ltd.

Inventor： Wenqi Zhou ,  Yan Yang ,  Ting Zhou ,  Junyi Li

IPC: G02F1/13 ,  G02F1/1335

Abstract: A display panel includes a plurality of pixel units. At least one pixel unit includes a display region and an anti-peep region. The anti-peep region includes a first light-blocking layer and a second light-blocking layer. The first light-blocking layer is on a side of the second light-blocking layer facing a light-exiting surface of the display panel. Along a direction perpendicular to the light-exiting surface of the display panel, a distance between the first light-blocking layer and the second light-blocking layer is greater than zero. Along a fifth direction, the first light-blocking layer includes a plurality of first light-blocking strips and a plurality of first openings. A first opening is arranged between two neighboring first light-blocking strips. The fifth direction is parallel to the light-exiting surface of the display panel. Along the fifth direction, the second light-blocking layer includes a plurality of second light-blocking strips and a plurality of second openings.

公开(公告)号：US12112689B2

公开(公告)日：2024-10-08

申请号：US18071449

申请日：2022-11-29

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Jieliang Li ,  Jiaxian Liu

IPC: G09G3/32 ,  G09G3/20 ,  G09G3/3233

CPC classification number: G09G3/32 ,  G09G3/2092 ,  G09G3/3233 ,  G09G2310/0278 ,  G09G2320/043

Abstract: A display panel includes a pixel circuit and a light-emitting element. The pixel circuit includes a data-writing module, a driving module, and a compensation module. The driving module is configured to provide a driving current for the light-emitting element, wherein the driving module includes a driving transistor, and the driving transistor is an NMOS transistor. The data-writing module is configured to selectively provide a data signal for the driving module. The compensation module is configured to compensate a threshold voltage of the driving transistor. An operational process of the pixel circuit includes a bias stage. In the bias stage, the compensation module is turned off, the driving transistor receives a bias signal, and the bias signal is configured to adjust a bias state of the driving transistor.

公开(公告)号：US12111541B2

公开(公告)日：2024-10-08

申请号：US17053349

申请日：2019-11-11

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Yan Yang ,  Ling Wu ,  Boping Shen

IPC: G02F1/1335 ,  G02F1/1343 ,  G09G3/34

CPC classification number: G02F1/133612 ,  G02F1/133531 ,  G02F1/134336 ,  G09G3/3426

Abstract: The present disclosure discloses a display device. The display device includes a first display structure, a second display structure and a backlight device. The first display structure includes first pixels arranged in an array, the first pixels are divided into multiple dimming areas, and each dimming area includes at least one first pixel. The first display structure is for adjusting the transmittance of each dimming area for lights emitted by the backlight device according to an image to be displayed in the next frame of the second display structure.

公开(公告)号：US12094400B2

公开(公告)日：2024-09-17

申请号：US18344886

申请日：2023-06-30

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Qingjun Lai ,  Yihua Zhu

IPC: G09G3/32 ,  G09G3/3266 ,  G09G3/20 ,  G09G3/325 ,  G11C19/28

CPC classification number: G09G3/32 ,  G09G3/3266 ,  G09G3/20 ,  G09G3/325 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0286 ,  G09G2310/061 ,  G09G2310/08 ,  G09G2330/021 ,  G09G2340/0435 ,  G11C19/28

Abstract: A display panel includes a driving circuit including N stages of cascaded shift registers, and each shift register includes: a first control part and a second control part; the second control part is configured to at least receive the signal of the second node, the signal of the third node, and a frequency control signal to generate an output signal; one shift register of the cascaded shift registers connected to a display unit in the first region is configured to receive the first frequency control signal, and one shift register of the cascaded shift registers connected to a display unit in the second region is configured to receive the second frequency control signal; a data refresh frequency of the display unit in the first region is F1, and a data refresh frequency in the second region is F2, F1

公开(公告)号：US20240248358A1

公开(公告)日：2024-07-25

申请号：US18137328

申请日：2023-04-20

Applicant: Xiamen Tianma Micro-Electronics Co., Ltd.

Inventor： Hao WU ,  Renliang ZHU ,  Poping SHEN

IPC: G02F1/1362 ,  G02F1/1368

CPC classification number: G02F1/136286 ,  G02F1/136227 ,  G02F1/1368

Abstract: A display panel and a display device are provided. The display panel includes a plurality of data lines and a plurality of scan lines. An extending direction of the plurality of data lines intersects an extending direction of the plurality of scan lines. The plurality of scan lines includes at least one first scan line. The first scan line includes a first portion. Metal conductivity of the first portion is greater than or equal to metal conductivity of the plurality of data lines.

公开(公告)号：US12008976B2

公开(公告)日：2024-06-11

申请号：US17881121

申请日：2022-08-04

Applicant: Xiamen Tianma Micro-Electronics Co.,Ltd.

Inventor： Peng Zhang ,  Xinzhao Liu

IPC: G09G3/36

CPC classification number: G09G3/3692 ,  G09G3/3659

Abstract: A display panel and driving method, and a display device are provided. The display panel includes a display region and a border region. The display region includes a plurality of data lines extending along a first direction. The border region includes a data output circuit, having an output end electrically connected to a data line. The data output circuit includes at least one demultiplexer and 2L first-demultiplexers, where L is a positive integer, and L1. Each demultiplexer group includes a plurality of second-demultiplexers. The plurality of second-demultiplexers share a group of clock signal buses, wherein a portion of the plurality of second-demultiplexers are connected with a portion of the group of clock signal buses, and a remaining portion of the plurality of second-demultiplexers are connected with a remaining portion of the group of clock signal buses.