Efficient Drift Avoidance Mechanism for Synchronous and asynchronous Digital Sample Rate Converters
    81.
    发明申请
    Efficient Drift Avoidance Mechanism for Synchronous and asynchronous Digital Sample Rate Converters 有权
    用于同步和异步数字采样率转换器的高效漂移避免机制

    公开(公告)号:US20150244349A1

    公开(公告)日:2015-08-27

    申请号:US14613388

    申请日:2015-02-04

    申请人: DSP Group LTD.

    IPC分类号: H03H17/06

    摘要: A device, comprising a first interpolator that is configured to (a) receive, at a first clock rate, a first signal having a first sampling rate and (b) output, at a second clock rate, a second signal having a first desired sampling rate average; wherein the first interpolator comprises: a first buffer for storing the first signal; and a first fractional sampling ratio circuit that is configured to generate a first pattern of fixed point values, wherein an average value of the first pattern corresponds to a first desired sampling rate ratio between the first desired sampling rate average and the first sampling rate.

    摘要翻译: 一种设备,包括第一内插器,其被配置为(a)以第一时钟速率接收具有第一采样率的第一信号,并且(b)以第二时钟速率输出具有第一期望采样的第二信号 速率平均 其中所述第一内插器包括:用于存储所述第一信号的第一缓冲器; 以及第一分数采样比电路,其被配置为产生固定点值的第一图案,其中所述第一图案的平均值对应于所述第一期望采样率平均值与所述第一采样率之间的第一期望采样率比。

    SAMPLE RATE CONVERTER WITH AUTOMATIC ANTI-ALIASING FILTER
    83.
    发明申请
    SAMPLE RATE CONVERTER WITH AUTOMATIC ANTI-ALIASING FILTER 有权
    具有自动反吸收过滤器的样品转速变送器

    公开(公告)号:US20130211827A1

    公开(公告)日:2013-08-15

    申请号:US13765686

    申请日:2013-02-12

    IPC分类号: G10L99/00

    摘要: The subject disclosure is directed towards dynamically computing anti-aliasing filter coefficients for sample rate conversion in digital audio. In one aspect, for each input-to-output sampling rate ratio (pitch) obtained, anti-aliasing filter coefficients are interpolated based upon the pitch (e.g., using the fractional part of the ratio) from two filters (coefficient sets) selected based upon the pitch (e.g., using the integer part of the ratio). The interpolation provides for fine-grained cutoff frequencies, and by re-computation for each pitch, smooth anti-aliasing with dynamically changing ratios.

    摘要翻译: 本发明涉及在数字音频中动态地计算采样率转换的抗混叠滤波器系数。 在一个方面,对于获得的每个输入到输出采样率(音调),抗混叠滤波器系数根据基于选择的两个滤波器(系数组)的音调(例如,使用该比率的小数部分)进行内插 (例如,使用比例的整数部分)。 内插提供细粒度截止频率,并通过重新计算每个音高,具有动态变化比率的平滑抗锯齿。

    DATA RATE CONVERSION DEVICE AND METHOD
    85.
    发明申请
    DATA RATE CONVERSION DEVICE AND METHOD 有权
    数据速率转换装置和方法

    公开(公告)号:US20110179099A1

    公开(公告)日:2011-07-21

    申请号:US12727908

    申请日:2010-03-19

    IPC分类号: G06F17/17

    摘要: Data rate conversion devices and methods are provided. A method for converting a first digital signal having a first sampling rate into a second digital signal having a sampling rate close to a predetermined second sampling rate comprises the following operations: when the ratio of the first sampling rate to the second sampling rate is a repeating infinite decimal, calculate at least two calibrating coefficient values and output the calibrating coefficient values according to a predetermined rule; conduct overflow operation on the output calibrating coefficient; and interpolate the first digital signal using the output calibrating coefficient and the result of the overflow operation to obtain the second digital signal such that during any period of a certain length along time axis, sampling times of the second digital signal equals to sampling times of the second sampling rate.

    摘要翻译: 提供数据速率转换设备和方法。 一种用于将具有第一采样率的第一数字信号转换成具有接近预定第二采样率的采样率的第二数字信号的方法包括以下操作:当第一采样率与第二采样率的比率是重复的 无限小数,计算至少两个校准系数值,并根据预定规则输出校准系数值; 对输出校准系数进行上溢操作; 并且使用输出校准系数和溢出操作的结果内插第一数字信号以获得第二数字信号,使得在沿着时间轴的一定长度的任何周期期间,第二数字信号的采样时间等于 第二次采样率。

    Cascaded integrated comb filter with fractional integration
    86.
    发明授权
    Cascaded integrated comb filter with fractional integration 失效
    具有分数整合的级联集成梳状滤波器

    公开(公告)号:US07750832B2

    公开(公告)日:2010-07-06

    申请号:US12239318

    申请日:2008-09-26

    申请人: Carsten Noeske

    发明人: Carsten Noeske

    IPC分类号: H03M3/00

    CPC分类号: H03H17/0685 H03H17/0671

    摘要: A cascaded integrator comb filter includes a first integrator that receives an input signal x[n] and provides an integrated signal, and a fractional integrator that also receives the input signal x[n] and provides a fractional integrated signal. A summer sums the integrated signal and the fractional integrated signal and provides a summed signal indicative thereof to a second integrator, which receives and integrates the summed signal to provide a second integrator output signal. A decimator unit receives the second integrator output signal and provides a decimated signal to a differentiator that receives the decimated signal and provides a differentiated signal.

    摘要翻译: 级联积分梳状滤波器包括接收输入信号x [n]并提供积分信号的第一积分器和还接收输入信号x [n]并提供分数积分信号的分数积分器。 夏季对积分信号和分数积分信号进行加和,并向第二积分器提供指示它的加和信号,该第二积分器接收并积分加和信号以提供第二积分器输出信号。 抽取器单元接收第二积分器输出信号,并且将抽取的信号提供给接收抽取信号并提供微分信号的微分器。

    Parallel fractional interpolator with data-rate clock synchronization
    87.
    发明授权
    Parallel fractional interpolator with data-rate clock synchronization 有权
    具有数据速率时钟同步的并行分数插值器

    公开(公告)号:US07340024B1

    公开(公告)日:2008-03-04

    申请号:US10690898

    申请日:2003-10-22

    IPC分类号: H04L7/00

    摘要: A circuit for single or parallel digital fractional interpolation of data samples has a fractional interpolator filter, an oscillator for outputting timing signals to the fractional interpolator filter, and a detector loop with a strobe feedback from the oscillator for outputting a frequency adjustment to the oscillator. Three different approaches are shown to determine the frequency adjustment. One approach is to generate a pulse based on the symbol clock, and measure the differences between the pulse and the strobe and between the strobe and the pulse. The smaller is the frequency adjustment. Another approach is to adjust the strobe period to match the symbol clock period. A third approach is to add an oscillator-driven clock to the symbol clock and integrate the sum over a symbol clock period to generate the frequency adjustment. Preferably, the interpolator filter takes N parallel inputs and samples each in parallel based on a plurality of oscillator timing signals, each corrected with reference to the frequency adjustment.

    摘要翻译: 用于数据样本的单或数位分数插值的电路具有分数内插滤波器,用于向定时内插滤波器输出定时信号的振荡器,以及具有来自振荡器的选通反馈的检测器回路,用于向振荡器输出频率调整。 显示了三种不同的方法来确定频率调整。 一种方法是基于符号时钟产生脉冲,并测量脉冲与选通脉冲之间以及选通脉冲与脉冲之间的差异。 频率调整越小。 另一种方法是调整选通周期以匹配符号时钟周期。 第三种方法是将振荡器驱动的时钟添加到符号时钟,并在符号时钟周期内积分并产生频率调整。 优选地,内插器滤波器根据多个振荡器定时信号并行地并联N个并行输入和采样,每个振荡器定时信号经参考频率调整进行校正。

    Up and down sample rate converter
    88.
    发明授权
    Up and down sample rate converter 有权
    上下采样率转换器

    公开(公告)号:US07336208B2

    公开(公告)日:2008-02-26

    申请号:US10550875

    申请日:2004-03-24

    IPC分类号: H03M7/00

    CPC分类号: H03H17/0685 H03H17/0294

    摘要: Sample rate converters (12) for converting input sample rates (F81) of signals into output sample rates (Fs4) are provided with sample rate adapters (3,6) for adapting (basic idea) intermediate sample rates (Fs2) such that output sample rates (Fs4) are larger (upsampling) or smaller (downsampling) than input sample rates (F81), to reduce their complexity and to avoid bookkeeping and structure switching problems. Sample rate adapters (3,6) in the form of variable sample rate decreasers (3) allow the sample rate converters (12) to be used in video applications requiring DC-out being equal to DC-in. Sample rate adapters (3,6) in the form of variable sample rate increasers (6) allow the sample rate converters (12) to be used in audio applications. By locating the sample rate adapter (3,6) between a fixed sample rate increaser (1) for increasing with a factor K and a fixed sample rate decreaser (5) for decreasing with a factor M, filters (2,4) in between can be designed independently from the varying factor L as long as K and M are fixed and L

    摘要翻译: 将采样速率转换器(12)用于将信号的输入采样率(F 81)变换成输出采样率(F S s S S S S S S N) 用于适应(基本思想)中间采样率(F S2),使得输出采样率(F S S S S S S)比输入更大(上采样)或更小(下采样) 采样率(F 81),以降低它们的复杂性并避免记帐和结构切换问题。 可变采样率降压器(3)形式的采样率适配器(3,6)允许采样率转换器(12)用于需要DC-out等于DC-in的视频应用中。 可变采样率增加器(6)形式的采样率适配器(3,6)允许采样率转换器(12)用于音频应用。 通过将采样率适配器(3,6)定位在用因子K增加的固定采样率增加器(1)和以因子M减小的固定采样率递减器(5)之间,滤波器(2,4)在 只要K和M是固定的,可以独立于变化因子L设计,并且 / SUP> -K。

    Sample rate converter having distributed filtering
    89.
    发明授权
    Sample rate converter having distributed filtering 有权
    采样率转换器具有分布式滤波

    公开(公告)号:US07280878B1

    公开(公告)日:2007-10-09

    申请号:US09427815

    申请日:1999-10-27

    申请人: David P. Rossum

    发明人: David P. Rossum

    IPC分类号: G06F17/00 G06F17/17 H03M7/00

    摘要: A method and a computer program product for sample rate conversion that features distributive or hybrid filtering to reduce unwanted artifacts, such as aliasing and the computational requirements to avoid the aforementioned artifacts. The method includes receiving, at a first sample rate, a plurality of data points, associated with a first signal, operating on the plurality of data points to associate the signal with a predetermined set of parameters, with the set of parameters including a first transition band having an image associated therewith; and varying the sample rate associated with the first signal by interpolation with an interpolator having associated therewith a second transition band, with the width associated with the second transition band being a function of a spectral separation between the first transition band and its image, wherein a second signal is produced having a sequence of data samples approximating the first signal.

    摘要翻译: 一种用于采样率转换的方法和计算机程序产品,其特征在于分布或混合滤波以减少不需要的伪像,例如混叠和避免上述伪像的计算要求。 该方法包括以第一采样速率接收与第一信号相关联的多个数据点,操作多个数据点以将信号与预定参数集合相关联,该参数组包括第一转换 具有与其相关联的图像; 以及通过具有与其相关联的内插器的插值来改变与第一信号相关联的采样率,第二过渡带与第二过渡频带相关联的宽度是第一过渡频带和其图像之间的频谱间隔的函数,其中a 产生具有接近第一信号的数据样本序列的第二信号。

    Sample rate converter for reducing the sampling frequency of a signal by a fractional number
    90.
    发明授权
    Sample rate converter for reducing the sampling frequency of a signal by a fractional number 有权
    采样率转换器,用于将信号的采样频率降低分数

    公开(公告)号:US07236110B2

    公开(公告)日:2007-06-26

    申请号:US11272254

    申请日:2005-11-10

    申请人: Gabriel Antonesei

    发明人: Gabriel Antonesei

    IPC分类号: H03M7/00

    CPC分类号: H03H17/0275 H03H17/0685

    摘要: A sample rate converter reduces the sampling rate of a signal by a fractional number U/D, where U represents an up-sampling rate and D represents a down-sampling rate. The converter comprises an input for receiving an input data stream at a first rate and an FIR filtering stage. The FIR filtering stage comprises a set of D polyphase filter branches, each branch including a set of filter coefficients which operate on a sample of the input signal. The converter also comprises a commutative switch which selectively connects a sample of the input data stream to one of the polyphase filter branches, the switch being arranged to skip every U−1 filter branches during a cycle through the filter branches. An output outputs an output data stream at a second data rate which is lower than the first data rate.

    摘要翻译: 采样率转换器将信号的采样率降低了分数U / D,其中U表示上采样率,D表示下采样率。 转换器包括用于以第一速率和FIR滤波级接收输入数据流的输入。 FIR滤波级包括一组D多相滤波器分支,每个分支包括在输入信号的样本上操作的一组滤波器系数。 转换器还包括可选择性地将输入数据流的样本连接到多相滤波器分支之一的交换开关,该开关被布置成在通过滤波器分支的周期期间跳过每个U-1滤波器分支。 输出以低于第一数据速率的第二数据速率输出输出数据流。