SSD architecture for FPGA based acceleration

    公开(公告)号:US11100017B2

    公开(公告)日:2021-08-24

    申请号:US16752612

    申请日:2020-01-24

    Abstract: A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream interface enables communication with the processor; a downstream interface enables communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager (APM-F) to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager (APM-S) to assist the APM-F in executing the acceleration instruction. The processor, the acceleration module, and the storage device may communicate via a Peripheral Component Interconnect Exchange (PCIe) bus. The acceleration module may support performing the acceleration instruction on the application data on the storage device for the application program without loading the application data into the memory.

    Solid state drive multi-card adapter with integrated processing

    公开(公告)号:US10996896B2

    公开(公告)日:2021-05-04

    申请号:US17088571

    申请日:2020-11-03

    Abstract: Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.

    DIFFERENTIATED STORAGE SERVICES IN ETHERNET SSD

    公开(公告)号:US20210117369A1

    公开(公告)日:2021-04-22

    申请号:US17134094

    申请日:2020-12-24

    Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

    SYSTEM AND METHOD FOR SUPPORTING MULTI-PATH AND/OR MULTI-MODE NMVE OVER FABRICS DEVICES

    公开(公告)号:US20210073157A1

    公开(公告)日:2021-03-11

    申请号:US16950624

    申请日:2020-11-17

    Abstract: A system includes a fabric switch including a motherboard, a baseboard management controller (BMC), a network switch configured to transport network signals, and a PCIe switch configured to transport PCIe signals; a midplane; and a plurality of device ports. Each of the plurality of device ports is configured to connect a storage device to the motherboard of the fabric switch over the midplane and carry the network signals and the PCIe signals over the midplane. The storage device is configurable in multiple modes based a protocol established over a fabric connection between the system and the storage device.

    Differentiated storage services in ethernet SSD

    公开(公告)号:US10884975B2

    公开(公告)日:2021-01-05

    申请号:US15878388

    申请日:2018-01-23

    Abstract: A system and method for differentiated storage services with a Ethernet SSD includes receiving, at an Ethernet SSD (eSSD), an input/output (I/O) service request from a remote host via a multiprotocol label switching (MPLS) network. The I/O service request includes at least one parameter that may be used to match the I/O service request to a label switched path (LSP) based on the parameter(s). A storage traffic stream may then be opened between the eSSD and the remote host over the MPLS network according to the LSP.

    Solid state drive multi-card adapter with integrated processing

    公开(公告)号:US10747473B2

    公开(公告)日:2020-08-18

    申请号:US16149034

    申请日:2018-10-01

    Abstract: Embodiments of the inventive concept include solid state drive (SSD) multi-card adapters that can include multiple solid state drive cards, which can be incorporated into existing enterprise servers without major architectural changes, thereby enabling the server industry ecosystem to easily integrate evolving solid state drive technologies into servers. The SSD multi-card adapters can include an interface section between various solid state drive cards and drive connector types. The interface section can perform protocol translation, packet switching and routing, data encryption, data compression, management information aggregation, virtualization, and other functions.

    SYSTEM AND METHOD FOR ACCELERATED DATA PROCESSING IN SSDS

    公开(公告)号:US20200183582A1

    公开(公告)日:2020-06-11

    申请号:US16269508

    申请日:2019-02-06

    Abstract: A method includes: receiving, at an acceleration platform manager (APM) from an application service manager (ASM), application function processing information; allocating, by the APM, a first storage processing accelerator (SPA) from a plurality of SPAs, wherein at least one SPA of the plurality of SPAs comprises a plurality of programmable processors or storage processing engines (SPEs), the plurality of SPEs comprising n SPEs, enabling the plurality of SPEs in the first SPA, wherein once enabled, the at least one SPE of the plurality of SPEs in the first SPA is configured to process data based on the application function processing information; determining, by the APM, if data processing is completed by the at least one SPE of the plurality of SPEs in the first SPA; and sending, by the APM, a result of the data processing by the SPEs of the first SPA, to the ASM.

    SSD architecture for FPGA based acceleration

    公开(公告)号:US10592443B2

    公开(公告)日:2020-03-17

    申请号:US16124183

    申请日:2018-09-06

    Abstract: A system is disclosed. The system may include a processor running an application program and a memory storing data being used by the application program. An upstream port enables communication with the processor; a downstream port enables communication with a storage device. The system may also include an acceleration module implemented using hardware and including an Acceleration Platform Manager (APM-F) to execute an acceleration instruction. The storage device may include an endpoint of the storage device for communicating with the acceleration module, a controller to manage operations of the storage device, storage for application data for the application program, and a storage device Acceleration Platform Manager (APM-S) to assist the APM-F in executing the acceleration instruction. A downstream filter associated with the downstream port may intercept an acceleration instruction associated with a downstream Filter Address Range (FAR) received from the storage device and deliver the acceleration instruction to the APM-F, the acceleration instruction being. The processor, the acceleration module, and the storage device may communicate via a Peripheral Component Interconnect Exchange (PCIe) bus. The acceleration module may support performing the acceleration instruction on the application data on the storage device for the application program without loading the application data into the memory.

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