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81.发明授权公开(公告)号：US12284877B2
公开(公告)日：2025-04-22
申请号：US17427074
申请日：2020-12-29
Inventor： Zhidong Yuan , Can Yuan , Xuelian Cheng , Jing Gan , Meng Li
IPC: H10K59/121 , H10K50/86 , H10K59/38 , H10K71/00 , H10K59/12
Abstract: A display device, a display panel thereof, and a method of manufacturing the display panel are provided. The display panel includes: a substrate; a light-emitting structure disposed on the substrate; a pixel driving circuit disposed between the substrate and the light-emitting structure, and including a storage capacitor, an orthographic projection of the storage capacitor on the substrate at least partially overlaps with an orthographic projection of the light-emitting structure on the substrate, the storage capacitor includes a first transparent electrode plate disposed adjacent to the substrate and a second transparent electrode plate disposed far away from the substrate, and an orthographic projection of the first transparent electrode plate on the substrate is located within an orthographic projection of the second transparent electrode plate on the substrate.
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公开(公告)号：US20250098446A1
公开(公告)日：2025-03-20
申请号：US18558247
申请日：2022-10-28
Inventor： Can Yuan , Liu Wu , Zhidong Yuan , Luke Ding , Yongqian Li , Cheng Xu , Dandan Zhou , Dacheng Zhang
IPC: H10K59/131 , G09G3/3225
Abstract: A display substrate and driving method thereof, a display device are provided. The display substrate includes: a base substrate, and a plurality of repeating units and a plurality of data lines on the base substrate, the plurality of repeating units are divided into plurality of repeating unit columns; each repeating unit includes a plurality of subpixels, the subpixel includes a subpixel driving circuit, the subpixel driving circuit includes a data writing transistor, a writing control transistor and a driving transistor; the first electrode of the data writing transistor is coupled to the corresponding data line, the second electrode of the data writing transistor is coupled to the first electrode of the writing control transistor, and the second electrode of the writing control transistor is coupled to the gate of the driving transistor.
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公开(公告)号：US12254836B2
公开(公告)日：2025-03-18
申请号：US17781268
申请日：2021-07-08
Inventor： Yongqian Li , Can Yuan
IPC: G09G3/3266 , G09G3/3225 , G09G3/3291
Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate; a plurality of pixels; and a light emitting control line and a first power supply line which are electrically connected to a light emitting control circuit of the pixel. The light emitting control circuits of pixels located in two adjacent rows share the same light emitting control line. The light emitting control circuit includes a light emitting control transistor, the gate of the light-emitting control transistor is electrically connected to the light emitting control line, one of the first electrode and the second electrode of the light emitting control transistor is connected to the first power supply line, and the first power supply line extends in parallel to the light emitting control line.
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公开(公告)号：US12250867B2
公开(公告)日：2025-03-11
申请号：US17791262
申请日：2021-09-28
Inventor： Zhidong Yuan , Pan Xu , Yongqian Li , Can Yuan
IPC: H10K59/88 , G01R31/28 , G09G3/3233 , G09G3/3266 , H10K71/70
Abstract: A display panel, and a test method thereof, a display apparatus, each subpixel of the pixel array of the display panel includes a pixel circuit, a first signal line configured to provide a scanning signal to the pixel circuit, a scan driver circuit configured to provide the scanning signal to the pixel circuit and includes a shift register and a clock signal line in the display area; a test circuit board in the non-display area and including a test pad; and a test lead in the non-display area and electrically connected with the test pad. The first signal line includes a first part in the display area and a second part in the non-display area, the first part extends substantially along the first direction.
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公开(公告)号：US12230210B2
公开(公告)日：2025-02-18
申请号：US18547182
申请日：2022-09-30
Inventor： Liu Wu , Can Yuan , Zhidong Yuan , Cheng Xu , Luke Ding , Yongqian Li , Xiuting Liu
IPC: G09G3/3233 , H10K59/131
Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.
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Patent Agency Ranking
公开(公告)号：US12223900B2
公开(公告)日：2025-02-11
申请号：US18272811
申请日：2022-07-29
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan , Liu Wu , Xiuting Liu , Luke Ding , Cheng Xu , Miao Liu , Xing Yao
IPC: G09G3/3233 , G11C19/28 , H10K59/131
Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.
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公开(公告)号：US12211448B2
公开(公告)日：2025-01-28
申请号：US17779164
申请日：2021-03-29
Inventor： Zhidong Yuan , Pan Xu , Yongqian Li , Can Yuan , Zhongyuan Wu
IPC: G11C19/00 , G09G3/32 , G09G3/3266 , G11C19/28
Abstract: A display panel includes sub-pixels and a scan driving circuit. The scan driving circuit includes a plurality of stages of shift registers including at least one first shift register and at least one second shift register, and a plurality of clock signal lines including at least one first sub-clock signal line and at least one second sub-clock signal line. Each shift register includes a first sub-circuit and a second sub-circuit. A first sub-clock signal line in the at least one first sub-clock signal line is electrically connected to a first sub-circuit in a first shift register in the at least one first shift register. A second sub-clock signal line in the at least one second sub-clock signal line is electrically connected to one sub-circuit of a first sub-circuit and a second sub-circuit in a second shift register in the at least one second shift register.
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公开(公告)号：US12062304B2
公开(公告)日：2024-08-13
申请号：US17262775
申请日：2020-06-02
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
CPC classification number: G09G3/006 , H01L27/0251 , H01L27/0292 , H01L27/124 , H01L27/1255 , G09G2300/0426 , G09G2310/0286
Abstract: An array substrate and a testing method thereof are provided. The array substrate includes a gate driving circuit, a plurality of clock signal lines and a plurality of testing terminals, wherein a number of the clock signal lines is greater than a number of the testing terminals; the plurality of clock signal lines are connected to the gate driving circuit and the plurality of testing terminals, and at least two clock signal lines are connected to a same testing terminal; and the plurality of testing terminals are configured to connect to a testing device.
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89.发明授权公开(公告)号：US12040029B2
公开(公告)日：2024-07-16
申请号：US17776306
申请日：2021-05-26
Inventor： Can Yuan , Yongqian Li , Zhidong Yuan
IPC: G09G3/3225 , G11C19/28
CPC classification number: G11C19/28 , G09G3/3225 , G09G2300/0842 , G09G2310/0286 , G09G2310/08
Abstract: A shift register includes: an input circuit electrically connected to a first clock signal terminal, a first voltage signal terminal and a first node; a first output circuit electrically connected to the first node, a second clock signal terminal and a scanning signal terminal; a first control circuit electrically connected to a third clock signal terminal, a fourth clock signal terminal, a fifth clock signal terminal and the first node; a second control circuit electrically connected to a sixth clock signal terminal, a second voltage signal terminal, the first node, the first voltage signal terminal and a second node; a third control circuit electrically connected to the first node, the second voltage signal terminal, the third clock signal terminal and the second node; and a second output circuit electrically connected to the second node, the second voltage signal terminal and the scanning signal terminal.
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公开(公告)号：US11935483B2
公开(公告)日：2024-03-19
申请号：US17310353
申请日：2020-12-29
Inventor： Zhidong Yuan , Yongqian Li , Can Yuan
IPC: G09G3/3266 , G09G3/3233 , G09G3/3291
CPC classification number: G09G3/3266 , G09G3/3233 , G09G3/3291 , G09G2310/0286
Abstract: Provided are a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: multiple sub-pixel circuits in an array; each sub-pixel circuit includes a first node control sub-circuit, a second node control sub-circuit, a driving sub-circuit, a storage sub-circuit, a reading sub-circuit and a light emitting device; at least reading sub-circuits of the sub-pixel circuits of some rows are controlled by a same sensing control line; the first node control sub-circuit charges the storage sub-circuit in response to a first scan signal; the second node control sub-circuit writes a reference voltage signal into a second node in response to a second scan signal; the reading sub-circuit reads a potential of the second node in response to a sensing control signal written by a sensing control line; the driving sub-circuit drives the light emitting device to emit light.
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