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81.
公开(公告)号:US12008974B2
公开(公告)日:2024-06-11
申请号:US17776267
申请日:2020-11-24
Inventor: Xuehuan Feng , Yongqian Li
CPC classification number: G09G3/3677 , G09G3/2092 , G09G2310/0286 , G09G2310/08
Abstract: A shift register circuit includes an input sub-circuit, an output sub-circuit and a control sub-circuit. The input sub-circuit is coupled to a first input signal terminal and a pull-up node, and configured to, under control of a first input signal, transmit the first input signal to the pull-up node. The output sub-circuit is at least coupled to the pull-up node, a first clock signal terminal and a first signal output terminal, and configured to transmit a first clock signal to the first signal output terminal under control of a voltage at the pull-up node. The control sub-circuit is coupled to at least one first reference node, at least one first control signal terminal and the pull-up node, and configured to transmit a voltage at a first reference node to the pull-up node under control of a first control signal.
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公开(公告)号:US11963397B2
公开(公告)日:2024-04-16
申请号:US17280725
申请日:2020-05-15
Inventor: Meng Li , Yongqian Li , Jingquan Wang , Chen Xu , Dacheng Zhang , Zhidong Yuan , Can Yuan , Xuehuan Feng
IPC: H10K59/121 , H10K59/126 , H10K59/131 , H10K59/38 , H10K71/00 , H10K59/12
CPC classification number: H10K59/121 , H10K59/1216 , H10K59/126 , H10K59/131 , H10K59/38 , H10K71/00 , H10K59/1201
Abstract: A display region includes a plurality of pixel driving circuitry setting regions arranged sequentially in a first direction, and each pixel driving circuitry setting region extends in a second direction intersecting the first direction. Each display circuitry includes a plurality of subpixels in one-to-one correspondence with the pixel driving circuitry setting regions, each subpixel includes a subpixel driving circuitry and a light-emitting element coupled to each other, the subpixel driving circuitry is located in a corresponding pixel driving circuitry setting region, the light-emitting element is located at a side of the subpixel driving circuitry away from the substrate, a width of the light-emitting element is greater than a width of the corresponding pixel driving circuitry setting region in the first direction, and a length of the light-emitting element is smaller than a length of the corresponding pixel driving circuitry setting region in the second direction.
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公开(公告)号:US11935484B2
公开(公告)日:2024-03-19
申请号:US17642983
申请日:2020-10-23
Inventor: Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3233 , G11C19/28 , H10K59/131
CPC classification number: G09G3/3266 , G09G3/3233 , G11C19/28 , H10K59/131 , G09G2300/0426 , G09G2300/0842 , G09G2310/0286 , G09G2330/021
Abstract: A display panel includes a plurality of rows of sub-pixels and at least one gate driver circuit that are disposed on a base substrate. Each sub-pixel includes a pixel driver circuit and a light-emitting device coupled to the pixel driver circuit, and a gate driver circuit includes a plurality of shift registers that are cascaded and a plurality of control signal lines. A shift register is coupled to a plurality of pixel driver circuits in at least one row of sub-pixels and at least a part of the plurality of control signal lines, and includes a plurality of first thin film transistors that are divided into a plurality of first thin film transistors. At least one thin film transistor group is located in the display region and distributed between adjacent sub-pixels in a same row of sub-pixels.
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84.
公开(公告)号:US11935469B2
公开(公告)日:2024-03-19
申请号:US17620195
申请日:2020-12-23
Inventor: Xuehuan Feng , Yongqian Li , Pan Xu , Zhongyuan Wu
IPC: G09G3/3275 , G09G3/3233 , G09G3/3266
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0426 , G09G2300/0842 , G09G2300/0861 , G09G2320/0233 , G09G2320/0257
Abstract: A pixel circuit array, a display panel, a method for driving a pixel circuit array, and a method for driving a display panel are provided. The pixel circuit array may include: a first signal sensing line (SENSE1) and a second signal sensing line (SENSE2); and N pixel circuits arranged in a column. All of the N pixel circuits are divided into a first group and a second group, each pixel circuit in the first group is coupled to the first signal sensing line (SENSE1), and each pixel circuit in the second group is coupled to the second signal sensing line (SENSE2) different from the first signal sensing line (SENSE1), where N is a positive integer greater than 1.
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85.
公开(公告)号:US11869426B2
公开(公告)日:2024-01-09
申请号:US17763818
申请日:2021-04-13
Inventor: Yongqian Li , Xuehuan Feng
IPC: G09G3/3233 , G11C19/28 , G09G3/3266
CPC classification number: G09G3/3233 , G11C19/28 , G09G3/3266 , G09G2300/0426 , G09G2300/0842 , G09G2310/0286 , G09G2310/08 , G09G2320/0233 , G09G2320/0257 , G09G2330/021
Abstract: A pixel driving circuit includes: a data writing sub-circuit configured to write a data signal received at a data signal terminal into a first node under control of a first scanning signal received at a first scanning signal terminal; a driving sub-circuit configured to drive a light-emitting device coupled to a second node to work under control of a voltage of the first node and a first power supply voltage signal received at a first power supply voltage signal terminal; and a time control sub-circuit configured to transmit a control signal received at a control signal terminal to the first node under control of a second scanning signal received at a second scanning signal terminal after the light-emitting to device works for a preset time, so that the driving sub-circuit is turned off to control the light-emitting device to stop working.
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公开(公告)号:US11862099B2
公开(公告)日:2024-01-02
申请号:US17730418
申请日:2022-04-27
Inventor: Xuehuan Feng , Yongqian Li
IPC: G09G3/32 , G11C19/28 , G09G3/36 , G09G3/3266 , G09G3/3225
CPC classification number: G09G3/3266 , G09G3/3225 , G11C19/28 , G09G2300/0426 , G09G2310/0286
Abstract: The present disclosure provides a shift register unit, including a detection signal input sub-circuit, a display signal input sub-circuit, an output circuit, a pull-down control circuit and a signal output terminal, the output circuit includes a pull-up sub-circuit and a pull-down sub-circuit, the pull-down control circuit includes a selection sub-circuit and a plurality of pull-down control sub-circuits. The present disclosure further provides a gate driving circuit, a display panel and a driving method for driving the display panel. The shift register unit has a simple structure and a long service life.
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公开(公告)号:US11798487B2
公开(公告)日:2023-10-24
申请号:US17769457
申请日:2021-03-01
Inventor: Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , H10K59/126 , H10K59/131 , G11C19/28
CPC classification number: G09G3/3266 , G11C19/28 , H10K59/126 , H10K59/1315 , G09G2310/0286
Abstract: A display panel has a display area including a plurality of pixel areas arranged in an array and a plurality of gate driving circuit areas. Each pixel area includes a pixel light-emitting sub-area and a pixel circuit sub-area arranged in a first direction. Pixel areas in each row correspond to at least two gate driving circuit areas each located between two adjacent pixel areas in this row. The display panel includes a gate driving circuit and a plurality of light-shielding portions. The gate driving circuit includes a plurality of shift registers that are cascaded. Each shift register includes a plurality of transistor groups, and each transistor group includes at least one transistor. Each light-shielding portion is located in a gate driving circuit area in which a transistor group is disposed, and is disposed on a periphery of the transistor group, and is electrically connected to a power supply signal line.
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公开(公告)号:US11798486B2
公开(公告)日:2023-10-24
申请号:US17764209
申请日:2021-05-20
Inventor: Xuehuan Feng , Yongqian Li
IPC: G09G3/3266 , G09G3/3225
CPC classification number: G09G3/3266 , G09G3/3225 , G09G2300/0426 , G09G2300/0842 , G09G2310/0286 , G09G2310/08 , G09G2320/029 , G09G2320/0233 , G09G2320/0252 , G09G2320/0257 , G09G2330/021
Abstract: A shift register, a gate drive circuit and a driving method therefor. The shift register includes a display pre-charge reset subcircuit, a sensing pre-charge reset subcircuit, a pull-down control subcircuit, an output subcircuit, a sensing cascade subcircuit and a black frame insertion cascade subcircuit. The display pre-charge reset subcircuit is configured to provide a signal of a first power supply end for a pull-up node under control of a first signal input end and provide a signal of a second power supply end to the pull-up node under control of a reset signal end; the sensing pre-charge reset subcircuit is configured to provide a signal of a first clock signal end to the pull-up node under control of the sensing cascade node and the first clock signal end, and provide a signal of the second power supply end to the pull-up node under control of a total reset end.
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公开(公告)号:US20230306891A1
公开(公告)日:2023-09-28
申请号:US18306723
申请日:2023-04-25
Inventor: Xuehuan Feng , Yongqian Li
CPC classification number: G09G3/2092 , G11C19/28 , G09G2300/0426 , G09G2310/0286 , G09G2310/061 , G09G2310/08
Abstract: Disclosed is a shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a blanking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of the first node, the composite output signal including a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.
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公开(公告)号:US11769455B2
公开(公告)日:2023-09-26
申请号:US17748788
申请日:2022-05-19
Inventor: Xuehuan Feng , Yongqian Li
IPC: G09G3/3266
CPC classification number: G09G3/3266 , G09G2310/0286
Abstract: Disclosed is a shift register unit set, a gate driving circuit and a display apparatus, the shift register set including: cascaded n shift register units, and an ith stage of shift register unit in the shift register unit set includes: a first input sub-circuit and a second input sub-circuit, wherein the first input sub-circuit includes: a charging sub-circuit, a storing sub-circuit, an isolating sub-circuit, an output sub-circuit, a first electric leakage prevention sub-circuit configured to input an operation potential to the isolating sub-circuit under the control of the blanking pull-up control node, and a second electric leakage prevention sub-circuit configured to input the operation potential to a second electrode of the isolating transistor under the control of the first pull-up node, wherein there is an overlap among n composite output signals output by the n shift register units, n and i are positive integers, and 1≤i≤n.
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