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公开(公告)号：US20240096863A1
公开(公告)日：2024-03-21
申请号：US17623628
申请日：2021-10-27
发明人： Xue BAI
CPC分类号： H01L25/167 , H01L33/0095 , H01L33/52 , H01L33/58 , H01L2933/0041
摘要： Embodiments of the present disclosure disclose a method for manufacturing a light-emitting substrate and a light-emitting substrate. The method for manufacturing a light-emitting substrate includes: forming a plurality of light emitting diode (LED) chips on a substrate, wherein a spacer region is deposed between adjacent LED chips; forming a black photoresist layer on the substrate to cover the plurality of LED chips and the plurality of spacer regions; performing first exposure on the black photoresist layer to reduce the black photoresist layer on the LED chips; and performing second exposure on the black photoresist layer to cure the black photoresist layer.
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公开(公告)号：US20240079416A1
公开(公告)日：2024-03-07
申请号：US17622490
申请日：2021-12-08
发明人： Chunge Yuan
IPC分类号： H01L27/12
CPC分类号： H01L27/1218 , H01L27/1262 , H01L27/1248
摘要： The embodiment of the present application discloses a display substrate, a display panel and a manufacturing method of the display substrate. The display substrate comprises a base substrate and a composite structure layer. The composite structure layer comprises a conductive layer and a colloidal medium layer. The colloidal medium layer comprises a plurality of conductive particles. The plurality of conductive particles are located at a position of the colloidal medium layer close to the conductive layer to form a conductive particle part. The present application can reduce the height difference between the conductive layer and the edge of the conductive particle part, and reduce the risk of fracture or breakdown.
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公开(公告)号：US11923397B2
公开(公告)日：2024-03-05
申请号：US17056982
申请日：2020-10-20
发明人： Macai Lu , Yong Fan , Minggang Liu , Nian Liu , Jiangbo Yao
CPC分类号： H01L27/156 , H01L33/62
摘要： The present invention discloses a micro light emitting diode display substrate and a manufacturing method thereof. The substrate includes an underlay substrate, a thin film transistor and a micro light emitting diode disposed on a top surface of the underlay substrate and connected to each other, a first metal film layer disposed on a bottom surface of the underlay substrate and at least formed with fanout circuit pattern and a side printed bonding pad. The fanout circuit pattern is connected to the side printed bonding pad, the side printed bonding pad is connected to the thin film transistor through a side wire such that after the display substrate is assembled with a bezel, a top surface display pixel region can maximally approach the bezel, to achieve bezel-less effect.
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74.发明授权公开(公告)号：US11921387B2
公开(公告)日：2024-03-05
申请号：US17254923
申请日：2020-11-05
发明人： Bangqing Xiao , Sen Xu
IPC分类号： G02F1/1362 , G02F1/1345 , H01L27/12
CPC分类号： G02F1/136286 , G02F1/13454 , H01L27/124
摘要： The present invention provides a display panel and a display device using the display panel. By connecting a plurality of second scan lines in parallel, resistance between output terminals of chips on film (COF) and first scan lines are reduced, and differences between output resistances of the COF corresponding to different first scan lines are reduced, so differences between signals in different first scan lines are reduced, and uneven display problems in existing display panels are solved.
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公开(公告)号：US20240072062A1
公开(公告)日：2024-02-29
申请号：US17988101
申请日：2022-11-16
发明人： Kai HU , Fangmei Liu
IPC分类号： H01L27/12
CPC分类号： H01L27/1222 , H01L27/1237
摘要： The display panel includes a substrate and a plurality of thin film transistors disposed on the substrate. Each of the thin film transistors includes: a semiconductor layer on the substrate. The semiconductor layer includes a channel portion and conductor portions disposed on both sides of the channel portion. A gate electrode is defined with a first length, the channel portion is defined with a second length, and a ratio of the second length to the first length is greater than 0.7 and is less than or equal to 1.
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公开(公告)号：US20240065076A1
公开(公告)日：2024-02-22
申请号：US18325807
申请日：2023-05-30
发明人： Siwei HU
IPC分类号： H10K59/80 , G09G3/3266 , H10K71/00
CPC分类号： H10K59/873 , G09G3/3266 , H10K71/00 , H10K59/874 , H10K2102/331
摘要： A display panel includes a substrate and an encapsulation cover plate which are arranged opposite to each other, a driving circuit layer and a light emitting device layer which are sequentially arranged on one side of the substrate close to the encapsulation cover plate, and a dam interposed between the substrate and the encapsulation cover plate. The display panel has a display area and a non-display area arranged around the display area. The light emitting device layer is located in the display area, the driving circuit layer is located in the display area and the non-display area, and the dam is located in the non-display area and arranged around the display area. The dam partially overlaps with the driving circuit layer located in the non-display area. A manufacturing method of the display panel is also provided.
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公开(公告)号：US11908983B2
公开(公告)日：2024-02-20
申请号：US17419731
申请日：2021-05-26
发明人： Junling Liu
CPC分类号： H01L33/58 , H01L25/167 , H01L2933/0058
摘要： The present application discloses a display panel and a manufacturing method thereof. The display panel manufacturing method includes forming an LED die including a sacrificial layer on an array substrate, and then coating black glue material on the array substrate. The black glue material covers the array substrate and a surface of the sacrificial layer away from the array substrate. Then, the black glue material and the sacrificial layer are heated, and the black glue material is cured to form a black glue layer such that the sacrificial layer is decomposed. The display panel and the manufacturing method thereof provided by the present application are for improving contrast of the display panel.
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公开(公告)号：US20240055530A1
公开(公告)日：2024-02-15
申请号：US17898554
申请日：2022-08-30
发明人： Chuanbao LUO
IPC分类号： H01L29/786 , H01L29/66 , H01L25/16
CPC分类号： H01L29/78633 , H01L29/66969 , H01L25/167 , H01L27/124
摘要： A thin film transistor array substrate and a display panel are provided. The array substrate includes a substrate, a first metal layer, a first buffer layer, a second metal layer, a second buffer layer, an active layer, a gate insulating layer, a third metal layer, a passivation layer, and a fourth metal layer. By arranging the fourth metal layer on the passivation layer, an influence of water vapor in the environment on the array substrate is blocked, thereby improving a product yield and a reliability of the display panel.
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公开(公告)号：US20240055444A1
公开(公告)日：2024-02-15
申请号：US17605072
申请日：2021-09-30
发明人： Xingqiang DAI
IPC分类号： H01L27/12 , G02F1/1368 , G02F1/1362
CPC分类号： H01L27/1248 , H01L27/1288 , G02F1/1368 , G02F1/136227
摘要： The present application discloses an array substrate, a method of manufacturing the same, and a display panel. The method of manufacturing the array substrate includes: providing a substrate; sequentially stacking an active layer, a gate insulating layer, and a gate on the substrate and patterning the active layer, the gate insulating layer, and the gate with a photomask to form an active portion, a gate insulating portion, and a gate portion stacked in sequence; and providing an interlayer dielectric layer on the substrate, the active portion, the gate insulating portion, and the gate portion.
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公开(公告)号：US20240055438A1
公开(公告)日：2024-02-15
申请号：US17440186
申请日：2021-08-03
发明人： Chuanbao Luo
CPC分类号： H01L27/124 , H01L27/1288 , H01L25/167
摘要： The present application discloses a method of manufacturing an array substrate, an array substrate, and a display panel. The present application saves one photolithography process by patterning a first metal layer, a buffer layer, and a semiconductor layer in a same manufacturing process, and also saves one photolithography process by manufacturing a third electrode plate, a drain electrode, a gate electrode, a source electrode, and a connection portion in a same manufacturing process. Therefore, the method of manufacturing the array substrate provided by the present application can reduce two photolithography processes, which is beneficial to improve a production efficiency of the array substrate.
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