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公开(公告)号：US11824506B2
公开(公告)日：2023-11-21
申请号：US17496431
申请日：2021-10-07
Inventor： Anthony Eric Turvey , Michael E. Harrell , Murat Demirkan
CPC classification number: H03G3/30 , H03F3/04 , H03M1/001 , H03G2201/103
Abstract: An amplifier circuit comprises a first gain circuit path configured to provide a first signal gain to an input signal, a second gain circuit path configured to provide a second signal gain to an input signal, an auxiliary gain circuit path configured to provide an auxiliary signal gain to an auxiliary input signal, wherein the auxiliary signal gain is equal to the first signal gain minus the second signal gain, a summing circuit configured to sum the second gain signal path and the auxiliary signal path, and logic circuitry configured to change an output of the circuit between the first gain circuit path and the sum of the second gain signal path and the auxiliary signal path, and set the auxiliary input signal equal to the input signal before the changing.
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公开(公告)号：US20230361485A1
公开(公告)日：2023-11-09
申请号：US18067495
申请日：2022-12-16
Inventor： Mohamed Moharram HASSAN , John N. POELKER
CPC classification number: H01Q21/24 , H01Q21/061
Abstract: Systems configured to implement semi-closed wireless data transfer for rotary joints are disclosed. An example system includes first and second RF transceivers, to be included in different components of a rotary joint. The first and second RF transceivers implement elliptically (e.g., circularly) polarized antennas to realize a short distance communication link (e.g., a 60 GHz short distance communication link) between the two components of a rotary joint. The example system further includes an open-ended waveguide (OEWG) between the first and second RF transceivers, for receiving, at a first end of the OEWG, wireless signals transmitted by one of the first and second RF transceivers, transmitting the received signals through the OEWG, and radiating, at a second end of the OEWG, wireless signals indicative of the received wireless signals, to be received by another one of the first and second RF transceivers.
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公开(公告)号：US20230342242A1
公开(公告)日：2023-10-26
申请号：US17726123
申请日：2022-04-21
Inventor： Shaun Stephen Bradley , Bernard Sherwin Leung Chiw , Andreas G Callanan , Thomas J. Meany , Pat Crowe
CPC classification number: G06F11/1044 , G06F11/1068 , G11C29/52
Abstract: A memory device comprising a memory array including memory cells to store memory data, error correcting code (ECC) circuitry configured to generate ECC data and use the ECC data to detect errors in the memory data, and an ECC circuitry checker. The ECC circuitry checker is configured to substitute the ECC data with check ECC data, compare an output of the ECC circuitry to an expected output when the substituted check ECC data is applied to the ECC circuitry, and generate an alert when the comparing indicates an error in the ECC circuitry.
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公开(公告)号：US20230336182A1
公开(公告)日：2023-10-19
申请号：US18317582
申请日：2023-05-15
Inventor： Justin L. FORTIER , Benjamin Philip WALKER
CPC classification number: H03L7/1974 , H03L7/085 , H03L7/185
Abstract: Systems, devices, and methods related to frequency divider circuitry are provided. An apparatus includes frequency divider circuitry including a first node to receive an input signal; fractional divider circuitry to generate, based on the input signal and a frequency-division ratio, a first signal having a first series of pulses with adjacent pulses triggered by opposite edges of the input signal, wherein the fractional divider circuitry includes first signal selection circuitry; balancer divider circuitry to generate, based on the input signal, a second signal having a second series of pulses aligned to the first series of pulses, wherein the balancer divider circuitry includes second signal selection circuitry triggered by opposite edges of the input signal than the first signal selection circuitry; and a second node to combine the first signal and the second signal.
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公开(公告)号：US20230304958A1
公开(公告)日：2023-09-28
申请号：US18187466
申请日：2023-03-21
Inventor： Alfonso BERDUQUE , David BOLOGNIA , William W. HANLEY , Richard DOYLE , Louise M. McGRATH , Julie BYARD , Alan J. O'DONNELL
IPC: G01N27/30 , G01N27/327
CPC classification number: G01N27/301 , G01N27/3272
Abstract: A reference electrode of an electrochemical sensor includes a substrate having internal walls defining a well and a channel. The reference electrode includes a conductive element disposed in the substrate. The well extends from a first surface of a substrate towards a second surface of the substrate. The channel is within the substrate. The channel has a first end connected to the well and a second end that is in contact with the conductive element. The reference electrode may include an additional well that extends from the first surface towards the second surface. The additional well may be connected to the second end of the channel and may be in contact with the conductive element. The channel and the wells form a flow path of a conductive medium. The flow path may be coupled to an agitating element or heating element that promotes flow of the conductive medium.
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Patent Agency Ranking
公开(公告)号：US20230283251A1
公开(公告)日：2023-09-07
申请号：US17684288
申请日：2022-03-01
IPC: H03F3/45
CPC classification number: H03F3/45475
Abstract: A capacitive amplifier device and technique for mitigating the perturbation within the switchable terminals of a feedback capacitor which is produced by the switching activity performed as part of the device's operation. The capacitive amplifier contains feedback components which can be switched without producing significant kickback or poorly behaved transitions due to the inclusion of at least one dedicated circuit. The dedicated circuit is a kickback limiter circuitry which is connected to a switchable node and is designed to reduce the kickback. The technique for reducing the kickback produced can be achieved by connecting and activating the kickback limiter circuitry.
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公开(公告)号：US20230280330A1
公开(公告)日：2023-09-07
申请号：US18309518
申请日：2023-04-28
Inventor： Christophe ANTOINE , Himanshu JAIN , Matthew Thomas CANTY , Christina B. MCLOUGHLIN , Daniel Joseph LUCEY , Sinead Maire MCDERMOTT , Stephen O'BRIEN , Bernard STENSON , Shane GEARY , William Allan LANE , Michael COLN , Mark Daniel de Leon ALEA
IPC: G01N33/487
CPC classification number: G01N33/48721
Abstract: Embodiments of the disclosure provide various nanogap sensor designs (e.g., horizontal nanogap sensors, vertical nanogap sensors, arrays of multiple nanogap sensors, various arrangements for making electrical connections to the electrodes of nanogap sensors, etc.), as well as various methods which may be used to fabricate at least some of the proposed sensors. The nanogap sensors proposed herein may operate as molecular sensors to help identify chemical species through electrical measurements using at least a pair of electrodes separated by a nanogap.
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公开(公告)号：US20230261392A1
公开(公告)日：2023-08-17
申请号：US17670268
申请日：2022-02-11
Inventor： Ahmed A. SAKR , Mohamed Alaaeldin Moharram HASSAN
CPC classification number: H01Q21/065 , H01Q21/30 , H01Q9/0414
Abstract: Systems, devices, and methods related to dual wideband antennas with arbitrary frequency ranges are provided. An example antenna structure includes a high-band patch antenna to wirelessly communicate a first signal in a first frequency band; a low-band patch antenna to wirelessly communicate a second signal in a second frequency band lower than the first frequency band, wherein the low-band patch antenna is stacked vertically below the high-band patch antenna and spaced apart from the high-band patch antenna by a dielectric substrate; a high-band excitation via electrically coupled to the high-band patch antenna; and a low-band excitation via electrically coupled to the low-band patch antenna, wherein the high-band excitation via is separate from the low-band excitation via.
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公开(公告)号：US20230258810A1
公开(公告)日：2023-08-17
申请号：US18067569
申请日：2022-12-16
Inventor： Jonathan Ephraim David HURWITZ , Nicolas LE DORTZ
IPC: G01S17/894 , H04N25/705 , H04N25/78 , H04N23/56 , H04N23/11 , H04N23/74 , G01S17/36 , G01S7/4915
CPC classification number: G01S17/894 , H04N25/705 , H04N25/78 , H04N23/56 , H04N23/11 , H04N23/74 , G01S17/36 , G01S7/4915
Abstract: A depth estimation system can enhance depth estimation using brightness image. Light is projected onto an object. The object reflects at least a portion of the projected light. The reflected light is at least partially captured by an image sensor, which generates image data. The depth estimation system may use the image data to generate both a depth image and a brightness image. The image sensor includes a plurality of pixels, each of which is associated with two ADCs. The ADCs receive different analog signals from the pixel and outputs different digital signals. The depth estimation system may use the different digital signals to determine the brightness value of a brightness pixel of the brightness image. The ADCs may be associated with one or more other pixels. The pixel and the one or more other pixels may be arranged in a same column in an array of the image sensor.
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公开(公告)号：US11714108B2
公开(公告)日：2023-08-01
申请号：US17834541
申请日：2022-06-07
Inventor： Michael D. Petersen , Kalin V. Lazarov , Gregory J. Manlove , Robert Chiacchia
CPC classification number: G01R15/146 , G01R19/32
Abstract: A system current sensor module can accurately sense or measure system current flowing through a sense current resistor by shunting current through a gain-setting resistor and using an amplifier to measure a resulting voltage, with an output transistor controlled by the amplifier controlling current through the gain setting resistor in a manner that tends to keep the amplifier inputs at the same voltage. The resistors can be thermally coupled to maintain similar temperatures when a system current is flowing. The thermal coupling can include conducting heat from a first resistor layer carrying the current sense resistor to a thermal cage layer located beyond a second resistor layer carrying the gain-setting resistor. This preserves accuracy, including during aging.
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