Abstract:
Linearity correction apparatus for a raster scanned cathode ray tube display device is presented. The apparatus comprises first means (16) for generating a correction signal to correct an asymmetric non linearity in a sawtooth electron beam line deflection current. The line deflection current is generated by a line timebase circuit for energising electromagnetic electron beam deflection coils of the cathode ray tube. The apparatus further comprises second means (70,90,91) cooperative with the first means (16) and responsive to a change in line timebase frequency for compensating a variation in the correction signal generated by the first means (16) in response to said change in line timebase frequency.
Abstract:
An improved system for continuously detecting and correcting the display in a cathode ray tube for errors in size and linearity. The system employs a crystal oscillator as a reference frequency to determine absolute error which is represented as "size" on the display screen, and relative error which is represented as linearity. The error is determined from the index pulse feedback, which is an output of a phase lock loop voltage controlled oscillator which is compared to the reference frequency to provide an error voltage level. This output level is then digitized and processed in terms of general control, interpolation, extrapolation, filtering, etc., testing, and stored in digital memory. The digital error data is converted back to analog levels for insertion into a horizontal auxiliary amplifier circuit for linearity correction. A main horizontal amplifier circuit receives size correction. Size correction is taken from the linearity data as a single data point per raster line which forms a lower frequency correction for each raster line. Linearity error includes approximately 256 points per raster line which provides for generation of complex correction wave forms.
Abstract:
A television apparatus comprises a video display having a wide format display ratio, for example approximately 16:9. A deflection circuit generates first and second selectable rasters having a common horizontal scan width corresponding to the display but having first and second vertical heights respectively, for example nominal and overscanned vertical heights. A control circuit selects one of the first and second rasters for displaying pictures from wide format display ratio video sources and conventional format display ratio video sources respectively, for example 16:9 and 4:3. A picture from the wide format display ratio video source is substantially uncropped and a picture from the conventional format display ratio video source is expanded and cropped. One of the vertical formats provides substantially no image aspect ratio distortion of the pictures as displayed. The other one of the vertical formats provides substantially no cropping of the pictures as displayed. The relative amounts of image aspect ratio distortion and cropping of the pictures as displayed are substantially inversely proportional. One of the vertical formats provides substantially no image aspect ratio distortion and substantially no cropping of the active picture portion as displayed, when the video source is in letterbox format. A convergence control system can be provided which automatically adjusts to the selected vertical format.
Abstract:
An East-West switching transistor is coupled between a flyback transformer primary winding and a horizontal deflection output transistor circuit to control retrace energy to obtain an East-West modulation of the deflection current amplitude as required for East-West pincushion raster correction. The East-West switching transistor isolates a retrace resonant circuit that includes a horizontal deflection winding from a flyback resonant circuit that includes the flyback transformer during a portion of retrace. The deflection winding is coupled to a common conductor to permit the use of a retrace voltage sample developed in the deflection winding as a feedback signal to synchronize the deflection current to the video signal. The arrangement reduces phase modulation of the deflection current as a function of beam current variations, that could be visible as a beam current dependent horizontal picture shift or a raster bending in a horizontal direction.
Abstract:
A full reset flyback regulator includes a power transformer having a primary winding and at least one secondary winding coupled to a load. A single control winding on a primary side of the power transformer is coupled through control circuitry to a gate electrode of a switching device that is connected to the primary winding. The voltage polarity on the control winding alternates so that if the switching device is "ON" a drive voltage is provided on its gate electrode and if the switching device is "OFF" a bias voltage is provided to the error amplifier control circuit. Each cycle of the regulator is initiated via a sync pulse which is provided from the high voltage flyback transformer of a display or monitor subsystem.
Abstract:
A sine wave deflecting circuit has a simplified configuration capable of ensuring an efficient and stable operation with a function of facilitating external synchronization. The deflecting circuit comprises a resonant circuit comprising a deflecting coil and a resonant capacitor, and a circuit for detecting a signal waveform of the resonant circuit and driving the resonant circuit in accordance with the detection signal, wherein the deflecting coil is driven with sine waves generated by self-oscillation. A deflection interruption time is set during the driving action, and the sine-wave driving frequency is controlled by controlling the length of such interruption time.
Abstract:
An arrangement that compensates for a tendency in a raster width of a display screen of a video display or television to increase when a variation in a beam current occurs, decreases an amplitude of a deflection current to decrease in a nonlinear manner as a function of an increase in the beam current. At a low beam current, a given increase in the beam current produces a decrease in the amplitude of the deflection current that is substantially greater than caused by the same increase at a high beam current.
Abstract:
A microprocessor controlled video montior is presented. The video monitor is able to automatically adjust the values of its parameters to adjust to operation on a number of different computer systems. The video monitor includes control lines, digital-to-analog converters and a control processor. The control processor, through the digital-to-analog converters, controls the values of the parameters of the video monitor. Stored in a non-volatile memory are entries which contain values of video monitor parameters. The control processor recognizes different computing systems on the basis of the frequency and polarity of horizontal and vertical synchronization signals. When either frequency or polarity of either the horizontal or vertical synchronization signals changes, the control processor will search the non-volatile memory for an entry in which values stored for both the frequency and polarity of both the horizontal and vertical synchronization signals matches the currently measured frequency and polarity of the horizontal and vertical synchonization signals. If a match is found the values for the parameters stored in the entry are applied by the control processor through the digital-to-analog converters to the control lines. A user may adjust certain parameters through the use of switches which are periodically polled by the control processor. When the control processor receives instructions from a user through manipulation of the switches the control processor makes the specified changes to the video monitor parameters and stores the new values in non-volatile memory.
Abstract:
A synchronizing signal automatic selecting circuit comprising a signal inverter for inverting synchronizing signal from a synchronizing signal separating circuit, a synchronizing signal detector for detecting synchronizing signal when a synchronizing signal is inputted to a horizontal and horizontal/vertical synchronizing signal input terminal and grounding the output signal of the signal inverter, a polarity detecting circuit for detecting the synchronizing signal polarity of the horizontal and horizontal/vertical synchronizing signal input terminal and a vertical synchronizing signal separator for separating the vertical synchronizing signal from the output signal of a transistor. The circuit is designed to automatically select with priority the synchronizing signal where the composite video signal and the synchronizing signal are inputted at the same time to a monitor used for a peripheral equipment of a computer without using a switch.
Abstract:
A unique Dot Scanning System is described which gives superior quality speed performance. One form of this dot scanning system is intra-dot and is applicable to both serial and line impact dot matrix printers, line and serial thermal printers, ink jet, as well as laser and LCD printers. In general, the speed of quality printing is more than doubled for given printhead performance. Another aspect of the invention involves inter-dot scanning as well as intra-dot recording and can be used in all the above applications. The scanning is preferably perpendicular to the printhead motion over the paper.