METHOD AND DEVICE FOR LOGGING PROCESS VARIABLES OF A DIGITAL FIELD DEVICE
    61.
    发明申请
    METHOD AND DEVICE FOR LOGGING PROCESS VARIABLES OF A DIGITAL FIELD DEVICE 审中-公开
    用于记录数字字段设备的过程变量的方法和设备

    公开(公告)号:US20110010475A1

    公开(公告)日:2011-01-13

    申请号:US12832535

    申请日:2010-07-08

    Abstract: A method and an electronic device are provided for logging process variables of a bus-controlled automation system in which process variables which are relevant to evaluation are buffered in at least one digital field device and are subsequently read, for the purpose of evaluation, by a central computer unit which is connected to the field device via a data bus. Process variable values which are relevant to evaluation are buffered in the field device in the form of a message, a plurality of equidistantly successive process variable values are recorded as messages, where the first process variable value is assigned a time stamp recorded for each message, and further process variable values are stored in further identical messages.

    Abstract translation: 提供了一种方法和电子设备,用于记录总线控制的自动化系统的过程变量,其中与评估相关的过程变量被缓冲在至少一个数字现场设备中,并且随后被读取以用于评估,由 中央计算机单元,经由数据总线连接到现场设备。 与评估相关的过程变量值以消息的形式被缓冲在现场设备中,多个等距连续的过程变量值被记录为消息,其中第一过程变量值被分配有针对每个消息记录的时间戳, 并且进一步的处理变量值存储在进一步相同的消息中。

    PORT PACKET QUEUING
    62.
    发明申请
    PORT PACKET QUEUING 失效
    港口包装队

    公开(公告)号:US20100325380A1

    公开(公告)日:2010-12-23

    申请号:US12862497

    申请日:2010-08-24

    Inventor: Richard M. Wyatt

    CPC classification number: H04L49/103 H04L49/901 H04L49/9047

    Abstract: A port queue includes a first memory portion having a first memory access time and a second memory portion having a second memory access time. The first memory portion includes a cache row. The cache row includes a plurality of queue entries. A packet pointer is enqueued in the port queue by writing the packet pointer in a queue entry in the cache row in the first memory. The cache row is transferred to a packet vector in the second memory. A packet pointer is dequeued from the port queue by reading a queue entry from the packet vector stored in the second memory.

    Abstract translation: 端口队列包括具有第一存储器访问时间的第一存储器部分和具有第二存储器访问时间的第二存储器部分。 第一存储器部分包括高速缓存行。 缓存行包括多个队列条目。 数据包指针通过将数据包指针写入第一个存储器中的缓存行中的队列条目中而排入队列中。 缓存行被传送到第二个存储器中的数据包向量。 通过从存储在第二存储器中的分组向量读取队列条目,将分组指针从端口队列中排队。

    Group tag caching of memory contents
    64.
    发明授权
    Group tag caching of memory contents 失效
    组标记缓存内存内容

    公开(公告)号:US07751422B2

    公开(公告)日:2010-07-06

    申请号:US11498581

    申请日:2006-08-03

    CPC classification number: H04L49/9047 H04L49/90 H04L49/901

    Abstract: A method according to one embodiment may include receiving one or more packets from at least one external device and storing one or more packets in at least one queue in memory, the memory includes a plurality of queues and a plurality of queue descriptors having pointer information to point to a queue. The method may also include grouping a plurality of queues to form a group of queues; generating a group tag that associates the group of queues; storing said group tag in a register in a content addressable memory (CAM); and mapping the queue descriptors for each queue in the group of queues into a queue array, the group tag may point to more than one of the queue descriptors in the queue array. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

    Abstract translation: 根据一个实施例的方法可以包括从至少一个外部设备接收一个或多个分组,并且将一个或多个分组存储在存储器中的至少一个队列中,所述存储器包括多个队列和多个队列描述符,其具有指向 指向队列。 该方法还可以包括对多个队列进行分组以形成一组队列; 生成将该组队列相关联的组标签; 将所述组标签存储在内容可寻址存储器(CAM)中的寄存器中; 并将队列中的每个队列的队列描述符映射到队列阵列中,组标签可以指向队列数组中的多个队列描述符。 当然,在不偏离本实施例的情况下,可以进行许多替代,变化和修改。

    MANAGEMENT OF STORAGE AND RETRIEVAL OF DATA LABELS IN RANDOM ACCESS MEMORY
    67.
    发明申请
    MANAGEMENT OF STORAGE AND RETRIEVAL OF DATA LABELS IN RANDOM ACCESS MEMORY 有权
    数据标签在随机访问存储器中的存储和检索管理

    公开(公告)号:US20100063983A1

    公开(公告)日:2010-03-11

    申请号:US12434350

    申请日:2009-05-01

    CPC classification number: H04L47/15 H04L12/18 H04L49/90 H04L49/9047

    Abstract: According to an example embodiment, a technique may be provided for managing a label data base of which each entry comprises a data field for insertion into a respective packet in a multicast transmission and a validity field. The technique may include, for example, (a) establishing a fixed size for a cluster of labels, (b) associating with each cluster a pointer to another cluster, (c) establishing a sentinel cluster of which all entries are indicated to be invalid and of which the cluster pointer points to this sentinel cluster, (d) establishing a root table which defines the number of replications of the packet in a multicast group and identifies a first label cluster associated with the multicast group and (e) establishing a chain of clusters of which each cluster which is full of valid entries points to the next cluster in the chain and the last cluster which contains valid entries points to the sentinel cluster.

    Abstract translation: 根据示例实施例,可以提供一种用于管理标签数据库的技术,其中每个条目包括用于在多播传输中的相应分组中插入的数据字段和有效性字段。 该技术可以包括例如(a)为标签集群建立固定大小,(b)将每个簇与另一个簇的指针相关联,(c)建立所有条目被指示为无效的哨兵群集 并且其簇指针指向该标识集群,(d)建立根表,其定义多播组中的分组的复制次数,并识别与多播组相关联的第一标签簇,以及(e)建立链 其中充满有效条目的每个集群的集群指向链中的下一个集群,并且包含有效条目的最后一个集群指向哨兵集群。

    Address generation for multiple access of memory
    68.
    发明申请
    Address generation for multiple access of memory 有权
    存储器多址访问的地址生成

    公开(公告)号:US20100005221A1

    公开(公告)日:2010-01-07

    申请号:US12217333

    申请日:2008-07-03

    Applicant: Esko Nieminen

    Inventor: Esko Nieminen

    Abstract: A memory bank has a plurality of memories. In an embodiment, a forward unit applies logical memory addresses to the memory bank in a forward twofold access order, a backward unit applies logical memory addresses to the memory bank in a backward twofold access order, and a half butterfly network (at least half, and barrel shifters in 8-tuple embodiments) is disposed between the memory bank and the forward unit and the backward unit. A set of control signals is generated which are applied to the half or more butterfly network (and to the barrel shifters where present) so as to access the memory bank with an n-tuple parallelism in a linear order in a first instance, and a quadratic polynomial order in a second instance, where n=2, 4, 8, 16, 32, . . . . This access is for any n-tuple of the logical addresses, and is without memory access conflict. In this manner memory access may be controlled data decoding.

    Abstract translation: 存储体具有多个存储器。 在一个实施例中,前向单元以前向双向访问顺序将逻辑存储器地址应用于存储体,后向单元以向后双向访问顺序向存储体提供逻辑存储器地址,以及半蝶形网络(至少一半, 和8元组实施例中的桶形移位器)被布置在存储体和前向单元和后向单元之间。 生成一组控制信号,这些控制信号被施加到一半或更多个蝶形网络(以及当前的桶形移位器),以便在第一种情况下以线性顺序访问具有n元组并行性的存储体, 二次多项式次序,其中n = 2,4,8,16,32,...。 。 。 。 该访问用于逻辑地址的任何n元组,并且没有内存访问冲突。 以这种方式,存储器访问可以被控制数据解码。

    Sharing memory among multiple information channels
    69.
    发明授权
    Sharing memory among multiple information channels 有权
    在多个信息通道之间共享内存

    公开(公告)号:US07565496B2

    公开(公告)日:2009-07-21

    申请号:US11040797

    申请日:2005-01-22

    CPC classification number: H04L49/90 H04L47/50 H04L47/6255 H04L49/9047

    Abstract: Memory is shared among multiple information channels, which may be of particular use for storing streams of packets. Memory allocation information is maintained which can be used to identify the current number of memory segments (e.g., some definable amount of memory) allocated for each of the multiple channels as well as the available number of shared memory segments. Items, such as, but not limited to data, packets, etc., are received and stored in the memory according to the memory allocation information. After a first processing stage for an item, the memory allocation information is updated to reflect an expected number of available memory segments to become available for the respective channel after a subsequent second processing stage. After the second processing stage is completed for an item, its number of memory segments are de-allocated based on the expected available data. In one embodiment, these memory segments are de-allocated one at a time.

    Abstract translation: 存储器在多个信息信道之间共享,这可能特别用于存储分组流。 维持存储器分配信息,其可以用于识别为多个通道中的每一个分配的存储器段的当前数量(例如,一些可定义的存储量)以及可用数量的共享存储器段。 诸如但不限于数据,分组等的项目根据存储器分配信息被接收并存储在存储器中。 在项目的第一处理阶段之后,更新存储器分配信息以反映在随后的第二处理阶段之后可用于相应通道的可用存储器段的预期数量。 在项目的第二处理阶段完成之后,基于预期的可用数据,其存储器段的数量被去分配。 在一个实施例中,这些存储器段被一次一个地分配。

    Method and system for shaping traffic in a parallel queuing hierarchy
    70.
    发明授权
    Method and system for shaping traffic in a parallel queuing hierarchy 有权
    并行排队层次结构中流量整形的方法和系统

    公开(公告)号:US07564790B2

    公开(公告)日:2009-07-21

    申请号:US11069738

    申请日:2005-02-28

    Abstract: A method and system for shaping traffic in a multi-level queuing hierarchy are disclosed. The hierarchy includes a high priority channel and a low priority channel, wherein traffic on the low priority channel is fragmented and interleaved with traffic from the high priority channel and traffic combined from the high priority and low priority channels has a maximum shape rate. The method includes linking a high priority token bucket to a low priority token bucket, transmitting data from the high priority channel, and decrementing the low priority token bucket by an amount corresponding to the data transmitted. Data is transmitted from the low priority channel only if the low priority bucket has available tokens.

    Abstract translation: 公开了一种用于整形多级排队层次中的业务的方法和系统。 该层级包括高优先级信道和低优先级信道,其中低优先级信道上的业务被分段并与来自高优先级信道的业务交织,并且从高优先级和低优先级信道组合的流量具有最大形状速率。 该方法包括将高优先级令牌桶与低优先级令牌桶相连,从高优先级信道发送数据,并将低优先级令牌桶减少与发送的数据相对应的量。 仅当低优先级桶具有可用令牌时才从低优先级信道发送数据。

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