公开(公告)号：US07408947B2

公开(公告)日：2008-08-05

申请号：US11029624

申请日：2005-01-06

Applicant: Jacob V. Nielsen

Inventor： Jacob V. Nielsen

IPC: H04L12/28 ,  H04B7/212

CPC classification number: H04L49/254 ,  H04L49/15 ,  H04L49/1523 ,  H04L49/3018

Abstract: A system and method of scheduling packets or cells for a switch device that includes a plurality of input ports each having at least one input queue, a plurality of switch units, and a plurality of output ports. There is generated, by each input port having a packet or cell in its at least one queue, a request to output the corresponding packet or cell to each of the output ports to which a corresponding packet or cell is to be sent to, wherein the request includes a specific one of the plurality of switch units to be used in a transfer of the packet or cell from the corresponding input port to the corresponding output port, the specific one of the plurality of switch units being selected according to a first priority scheme. Access is granted, per output port per switch unit, to the request made, the granting being based on a second priority scheme. Grants are accepted per input port per switch unit, the accepting being based on a third priority scheme. Packets and/or cells are outputted from the respective input ports to the respective output ports, based on the accepted grants, utilizing the corresponding switch units identified in the accepted grants.

Abstract translation: 一种用于交换设备调度分组或单元的系统和方法，该交换设备包括多个输入端口，每个输入端口具有至少一个输入队列，多个开关单元和多个输出端口。 通过在其至少一个队列中具有分组或小区的每个输入端口产生将对应的分组或小区输出到相应的分组或小区将被发送到的每个输出端口的请求，其中， 请求包括用于将数据包或单元从相应的输入端口传送到相应的输出端口的多个开关单元中的特定一个开关单元，根据第一优先方案选择多个开关单元中的特定的一个 。 根据每个交换机单元的每个输出端口授予访问权，该请求是基于第二优先权方案。 每个交换机单元的每个输入端口接受拨款，接受基于第三优先级方案。 基于所接受的授权，使用在接受的授权中标识的对应的开关单元，将分组和/或小区从相应的输入端口输出到相应的输出端口。

公开(公告)号：US20080183884A1

公开(公告)日：2008-07-31

申请号：US11952897

申请日：2007-12-07

Applicant: Wei-Pin Chen ,  Edward Ku ,  Yun-Fei Chao

Inventor： Wei-Pin Chen ,  Edward Ku ,  Yun-Fei Chao

IPC: G06F15/16

CPC classification number: H04L49/9047 ,  H04L29/06 ,  H04L47/2441 ,  H04L47/30 ,  H04L47/32 ,  H04L49/3018 ,  H04L49/505 ,  H04L49/90

Abstract: A data-packet processing method is used in a network system. The network system includes a buffer for optionally storing a data packet to be transferred, and the method includes steps of: determining a type of the data packet to be transferred; determining a storage state of a buffer where the data packet is to be temporarily stored before transferring; and storing the data packet into the buffer if the storage state of the buffer is a packet-accepting storage state; wherein the packet-accepting storage state of the buffer varies with the type of the data packet.

Abstract translation: 在网络系统中使用数据包处理方法。 网络系统包括用于可选地存储要传送的数据分组的缓冲器，并且该方法包括以下步骤：确定要传送的数据分组的类型; 在传送之前确定要临时存储数据分组的缓冲器的存储状态; 以及如果所述缓冲器的存储状态是分组接受存储状态，则将所述数据分组存储到所述缓冲器中; 其中缓冲器的分组接受存储状态随数据分组的类型而变化。

公开(公告)号：US07401126B2

公开(公告)日：2008-07-15

申请号：US09817008

申请日：2001-03-23

Applicant: Richard E. Pekkala ,  Christopher J. Pettey ,  Lawrence H. Rubin ,  Shaun V. Wandler

Inventor： Richard E. Pekkala ,  Christopher J. Pettey ,  Lawrence H. Rubin ,  Shaun V. Wandler

IPC: G06F15/16

CPC classification number: H04L49/103 ,  H04L49/3018 ,  H04L49/3027

Abstract: A transaction switch and integrated circuit incorporating said for switching data through a shared memory between a plurality of data interfaces that support different data protocols, namely packetized interfaces like InfiniBand and addressed data interfaces like PCI. The transaction switch also switches transactions commanding data transfers between the disparate protocol data interfaces and between those of the data interfaces having like protocols. For example, the transaction switch enables a hybrid InfiniBand channel adapter/switch to perform both InfiniBand packet to local bus protocol data transfers through the shared memory as well as InfiniBand packet switching between the multiple InfiniBand interfaces. The transactions are tailored for each interface type to include information needed by the particular interface type to perform a data transfer. The shared buffer memory, dynamically allocated by the transaction switch on a first-come-first serve basis, results in more efficient use of precious buffering resources than in a statically allocated scheme.

Abstract translation: 一种交易开关和集成电路，其包括用于在支持不同数据协议的多个数据接口之间的共享存储器切换数据，即诸如InfiniBand的分组接口和诸如PCI的寻址数据接口。 事务处理交换机还切换命令在不同的协议数据接口之间以及具有类似协议的数据接口之间的数据传输的事务。 例如，事务交换机使混合InfiniBand通道适配器/交换机能够通过共享内存来执行InfiniBand数据包到本地总线协议数据传输以及多个InfiniBand接口之间的InfiniBand数据包交换。 交易针对每个接口类型量身定制，以包括特定接口类型所需的信息来执行数据传输。 以先到先得的方式动态分配的共享缓冲存储器比静态分配方案更有效地利用了宝贵的缓冲资源。

公开(公告)号：US07366194B2

公开(公告)日：2008-04-29

申请号：US10124499

申请日：2002-04-17

Applicant: Shunjia Yu ,  David C. Banks ,  Ding-Long Wu ,  Jieming Zhu

Inventor： Shunjia Yu ,  David C. Banks ,  Ding-Long Wu ,  Jieming Zhu

IPC: H04L12/54

CPC classification number: H04L49/103 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/3036 ,  H04L49/357

Abstract: The present invention provides a system and a method for filtering a plurality of frames sent between devices coupled to a fabric by Fiber Channel connections. Frames are reviewed against a set of individual frame filters. Each frame filter is associated with an action, and actions selected by filter matches are prioritized. Groups of devices are “zoned” together and frame filtering ensures that restrictions placed upon communications between devices within the same zone are enforced. Zone group filtering is also used to prevent devices not within the same zone from communicating. Zoning may also be used to create LUN-level zones, protocol zones, and access control zones. In addition, individual frame filters may be created that reference selected portions of frame header or frame payload fields.

Abstract translation: 本发明提供了一种通过光纤通道连接对耦合到结构的设备之间发送的多个帧进行过滤的系统和方法。 框架将针对一组单独的框架过滤器进行审核。 每个帧过滤器与一个操作相关联，并且通过过滤器匹配选择的操作是优先级。 设备组“分区”在一起，并且帧过滤确保对相同区域内的设备之间的通信进行限制。 区域组过滤也用于防止不在同一区域内的设备进行通信。 分区也可用于创建LUN级别区域，协议区域和访问控制区域。 此外，可以创建引用帧头或帧有效载荷字段的所选部分的各个帧滤波器。

公开(公告)号：US20080089353A1

公开(公告)日：2008-04-17

申请号：US11871561

申请日：2007-10-12

Applicant: Bohdan DUNETS ,  Austin Kim

Inventor： Bohdan DUNETS ,  Austin Kim

IPC: H04L12/56

CPC classification number: H04L49/3018 ,  H04L49/101

Abstract: An MIQ packet switch device and packet switching method are provided. The MIQ packet switch device performs cell-based switching of packet data, and includes one or more input queue arrays for buffering cells input through one or more input ports. Each of the one or more input queue arrays includes an input interface for outputting the cells to one or more output ports. The one or more input queue arrays further include a switch matrix for switching and outputting each of the cells transferred by the input interface to a corresponding output port of the one or more output ports. The one or more queue arrays also include a scheduler for receiving descriptor information for cell scheduling from each of the one or more input queue arrays, and creating control information for controlling each of the one or more input queue arrays to selectively output the cells, based on the descriptor information.

Abstract translation: 提供了MIQ分组交换设备和分组交换方法。 MIQ分组交换设备执行分组数据的基于小区的切换，并且包括用于缓冲通过一个或多个输入端口输入的小区的一个或多个输入队列阵列。 一个或多个输入队列阵列中的每一个包括用于将单元输出到一个或多个输出端口的输入接口。 所述一个或多个输入队列阵列还包括用于切换和输出由所述输入接口传送到所述一个或多个输出端口的相应输出端口的每个小区的开关矩阵。 所述一个或多个队列阵列还包括调度器，用于从所述一个或多个输入队列阵列中的每一个接收用于小区调度的描述符信息，以及创建用于控制所述一个或多个输入队列阵列中的每一个以选择性地输出所述小区的控制信息 关于描述信息。

公开(公告)号：US07342936B2

公开(公告)日：2008-03-11

申请号：US10174435

申请日：2002-06-17

Applicant: Yongdong Zhao ,  Craig A. Lindahl

Inventor： Yongdong Zhao ,  Craig A. Lindahl

IPC: H04L12/54 ,  H04L12/56

CPC classification number: H04L12/5602 ,  H04L47/50 ,  H04L47/527 ,  H04L47/6225 ,  H04L49/3018 ,  H04L2012/5679

Abstract: A deficit round-robin scheduler including a round-robin table configured to store a plurality of cycle link lists, wherein each cycle link list includes a head flow identification (FLID) value identifying a first flow of the cycle link list, and a tail FLID value identifying a last flow of the cycle link list. A flow table is provided having a plurality of flow table entries, wherein each of the flow table entries is associated with a corresponding flow, and therefore has a corresponding FLID value. A packet queue is associated with each flow table entry, wherein each packet queue is capable of storing a plurality of packets. The deficit round-robin scheduler also included an idle cycle register having an idle cycle entry corresponding with each of the cycle link lists, wherein each idle cycle entry identifies the corresponding cycle link list as active or idle.

Abstract translation: 一种赤字循环调度器，其包括被配置为存储多个周期链路列表的循环表，其中每个周期链路列表包括标识所述周期链路列表的第一流的头部流标识（FLID）值和尾部FLID 识别循环链接列表的最后一个流的值。 提供具有多个流表条目的流表，其中每个流表条目与相应的流相关联，因此具有对应的FLID值。 分组队列与每个流表项相关联，其中每个分组队列能够存储多个分组。 赤字循环调度器还包括具有与每个循环链路列表相对应的空闲周期条目的空闲周期寄存器，其中每个空闲周期条目将对应的周期链路列表标识为活动或空闲。

公开(公告)号：US07324510B2

公开(公告)日：2008-01-29

申请号：US10412784

申请日：2003-04-11

Applicant: Wayne R. Howe

Inventor： Wayne R. Howe

IPC: H04L12/50

CPC classification number: H04L47/2416 ,  H04J3/0644 ,  H04J3/0667 ,  H04L12/5601 ,  H04L49/251 ,  H04L49/254 ,  H04L49/3009 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/602

Abstract: A system and method are described for synchronizing store-and-forward networks and for scheduling and transmitting continuous, periodic, predictable, time-sensitive, or urgent information such as real-time and high-priority messages over those networks. This enables packet-, cell-, and/or frame-based networks to thereby efficiently switch voice, video, streaming, and other real-time or high-priority data at the layer one or physical level, thus ensuring that the delivery of selected information can be made fast, on-time, immediate, non-blocked, non-congested, loss-less, jitter-free, and have guaranteed delivery, and guaranteed quality of service.

Abstract translation: 描述了用于同步存储和转发网络并用于通过这些网络调度和发送连续，周期，可预测，时间敏感或紧急信息（例如实时和高优先级消息）的系统和方法。 这使得分组，小区和/或基于帧的网络能够有效地在第一层或第一层级切换语音，视频，流和其他实时或高优先级数据，从而确保所选择的 信息可以快速，准时，即时，无阻塞，非拥塞，无损，无抖动，并保证交付，并保证服务质量。

公开(公告)号：US07304987B1

公开(公告)日：2007-12-04

申请号：US10395367

申请日：2003-03-24

Applicant: Kevin Warren James ,  Kenneth Yi Yun ,  Sushil Kumar Singh ,  Viet Linh Do ,  Michael John Hellmer ,  Kirk Alvin Miller ,  Jianfeng Shi ,  George Beshara Bendak

Inventor： Kevin Warren James ,  Kenneth Yi Yun ,  Sushil Kumar Singh ,  Viet Linh Do ,  Michael John Hellmer ,  Kirk Alvin Miller ,  Jianfeng Shi ,  George Beshara Bendak

IPC: H04L12/50

CPC classification number: H04L49/252 ,  G06F8/34 ,  H04L49/205 ,  H04L49/3018 ,  H04L49/3027 ,  H04L49/503

Abstract: A system and method are provided for resynchronizing backplane link management credit counters in a packet communications switch fabric. The method comprises: at an input port card ingress port, accepting information packets including cells and cell headers with destination information; modifying the destination information in the received cell headers; routing information packets between the input port card and output port cards on backplane data links through an intervening crossbar; at the input port card, maintaining a credit counter for each output port card channel; decrementing the counter in response to transmitting cells from the input port card; generating credits in response to transmitting cells from an output port card channel; sending the generated credits to increment the counter, using the modified destination information; and, using the generated credit flow to resynchronize the credit counter.

Abstract translation: 提供了用于在分组通信交换结构中重新同步背板链路管理信用计数器的系统和方法。 该方法包括：在输入端口卡入口端口，接收包括具有目的地信息的小区和小区标题的信息分组; 修改所接收的信元头部中的目的地信息; 在输入端口卡和输出端口卡之间通过插入式交叉开关将信息包路由在背板数据链路上; 在输入端口卡处，保持每个输出端口卡通道的信用计数器; 响应于从输入端口卡传输单元而递减计数器; 响应于从输出端口卡信道发送信元而产生信用; 使用修改的目的地信息发送生成的信用以增加计数器; 并使用生成的信用流来重新同步信用计数器。

公开(公告)号：US07275117B2

公开(公告)日：2007-09-25

申请号：US11237274

申请日：2005-09-28

Applicant: Victor A. Bennett ,  David A. Brown ,  Sean W. McGee ,  David P. Sonnier ,  Leslie Zsohar

Inventor： Victor A. Bennett ,  David A. Brown ,  Sean W. McGee ,  David P. Sonnier ,  Leslie Zsohar

IPC: G06F15/16 ,  G06F15/00

CPC classification number: G06F9/3851 ,  G06F9/30101 ,  H04L49/102 ,  H04L49/254 ,  H04L49/3018

Abstract: A fast pattern processor having an internal function bus and an external function bus. In one embodiment, a fast pattern processor includes: (1) an internal function bus, (2) an external function bus, (3) a context memory having a block buffer and a argument signature register wherein the block buffer includes processing blocks associated with a protocol data unit (PDU), (4) a pattern processing engine, associated with the context memory, that performs pattern matching and (5) a function interface system having (5A) a controller arbitration subsystem and (5B) a dispatch subsystem.

Abstract translation: 具有内部功能总线和外部功能总线的快速模式处理器。 在一个实施例中，快速图案处理器包括：（1）内部功能总线，（2）外部功能总线，（3）具有块缓冲器和参数签名寄存器的上下文存储器，其中所述块缓冲器包括与 协议数据单元（PDU），（4）与上下文存储器相关联的模式处理引擎，执行模式匹配;以及（5）具有（5A）控制器仲裁子系统和（5B）调度子系统的功能接口系统。

公开(公告)号：US20070133585A1

公开(公告)日：2007-06-14

申请号：US11297618

申请日：2005-12-08

Applicant: Cyriel Johan Minkenberg ,  Francois Abel ,  Enrico Schiattarella ,  Venkatesh Ramaswamy

Inventor： Cyriel Johan Minkenberg ,  Francois Abel ,  Enrico Schiattarella ,  Venkatesh Ramaswamy

IPC: H04L12/56 ,  H04L12/28

CPC classification number: H04L49/254 ,  H04L49/101 ,  H04L49/3018 ,  H04L49/3045 ,  H04L49/3072

Abstract: The method for scheduling interconnections in an interconnecting fabric comprises the following steps. In a determined time slot input selectors generate requests using a request pointer set, which is related to the determined time slot. Then, the requests are transmitted to output selectors, and the output selectors issue grants using a grant pointer set, which is also related to the determined time slot. In a further step the grants are transmitted to the input selectors, and the input selectors update the request pointer set. These steps are repeated, wherein for a further time slot a further request and grant pointer set are used, which are related to the further time slot.

Abstract translation: 用于调度互连结构中的互连的方法包括以下步骤。 在确定的时隙中，输入选择器使用与确定的时隙相关的请求指针集生成请求。 然后，请求被发送到输出选择器，并且输出选择器使用与确定的时隙相关的授权指针集来发出授权。 在另一步骤中，授权被发送到输入选择器，并且输入选择器更新请求指针集。 重复这些步骤，其中对于另外的时隙，使用与另外的时隙相关的另外的请求和授权指针集。