Abstract:
An image sensor includes a pixel array including a plurality of pixels. Each pixel is coupled to generate image data in response to incident light. A bit line is coupled to a column of pixels of the pixel array and is separated into first and second portions. Each portion is coupled to a corresponding portion of rows of pixels of the pixel array. A readout circuit coupled to the bit line to read out the image data from the pixel array. The readout circuit includes a cascode device coupled between the first and second portions of the bit line. The cascode device is coupled to be biased to electrically separate the first and second portions of the bit line from one another such that a capacitance of each portion of the bit line does not affect a settling time of an other portion of the bit line.
Abstract:
A photodiode is adapted to accumulate image charges in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charges from the photodiode to the floating diffusion. A transfer gate voltage controls the transmission of the image charges from a transfer receiving terminal of the transfer transistor to the floating diffusion. A reset transistor is coupled to supply a supply voltage to the floating diffusion. A source follower transistor is coupled to receive voltage of the floating diffusion from a gate terminal of the source follower and provide an amplified signal to a source terminal of the source follower. A row select transistor is coupled to enable the amplified signal from the SF source terminal and output the amplified signal to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. The bitline source node is coupled to a blacksun voltage generator. A current source generator is coupled between the bitline source node and a ground. The current source generator provides adjustable current to the bitline source node through a bias transistor controlled by a bias control voltage.
Abstract:
A photodiode is adapted to accumulate image charges in response to incident light. A transfer transistor is coupled between the photodiode and a floating diffusion to transfer the image charges accumulated in the photodiode to the floating diffusion. A reset transistor is coupled to supply a supply voltage to the floating diffusion. A source follower transistor is coupled to receive voltage of the floating diffusion from a SF gate terminal and provide an amplified signal to a source follower source terminal. A row select transistor is coupled to receive the amplified signal from the SF source terminal and output the amplified signal to a bitline. A bitline enable transistor controlled by a bitline enable voltage is coupled to link between the bitline and a bitline source node. The bitline is coupled to an idle voltage generator, a blacksun voltage generator, and a clamp voltage generator. These three voltage generators are each constructed out of a plurality of modified dummy pixels based on the dummy pixels in the dummy rows of an image sensor pixel array.
Abstract:
A pixel circuit includes a photodiode to accumulate image charge in response to incident light. A transfer transistor is disposed between the photodiode and a floating diffusion disposed in the first semiconductor layer to selectively transfer the image charge accumulated in the photodiode to the floating diffusion. A select circuit is disposed in second semiconductor layer coupled to a control terminal of the transfer transistor through a hybrid bond between the first and second semiconductor layers to select between first and second transfer control signals to control the transfer transistor. The select circuit is coupled to output the first transfer control signal in response to a precharge enable signal during a read out operation of a different row, and output the second transfer control signal in response to a sample enable signal during a read out operation of the row.
Abstract:
A pixel circuit includes a transfer transistor coupled between a photodiode and a floating diffusion to transfer image charge to the floating diffusion. A precharge offset signal is representative of a difference between a row that includes the transfer transistor and a different row that is being read out. The selection circuit is coupled to select between first and second transfer control signals to control the transfer transistor. The selection circuit is coupled to output the first transfer control signal in response to a precharge enable signal during a read out operation of the different row. The precharge enable signal is generated in response to a comparison of a precharge offset signal and an exposure value signal. The selection circuit is coupled to output the second transfer control signal in response to a sample enable signal during a read out operation of the row that includes the transfer transistor.
Abstract:
An image sensor includes a photodiode disposed in a first semiconductor material, and the photodiode is positioned to absorb image light through the backside of the first semiconductor material. A first floating diffusion is disposed proximate to the photodiode and coupled to receive image charge from the photodiode in response to a transfer signal applied to a transfer gate disposed between the photodiode and the first floating diffusion. A second semiconductor material, including a second floating diffusion, is disposed proximate to the frontside of the first semiconductor material. A dielectric material is disposed between the first semiconductor material and the second semiconductor material, and includes a first bonding via extending from the first floating diffusion to the second floating diffusion, a second bonding via disposed laterally proximate to the first bonding via, and a third bonding via disposed laterally proximate to the first bonding via.
Abstract:
A time of flight imaging system includes a light source coupled to emit light pulses to an object in response a light source modulation signal generated in response to a reference modulation signal. Each pixel cell of a time of flight pixel cell array is coupled to sense light pulses reflected from the object in response a pixel modulation signal. A programmable pixel delay line circuit is coupled to generate the pixel modulation signal with a variable pixel delay programmed in response to a pixel programming signal. A control circuit is coupled to receive pixel information from the time of flight pixel array representative of the sensed reflected light pulses. The control circuit is coupled to vary the pixel programming signal during a calibration mode to synchronize the light pulses emitted from the light source with the pulses of the pixel modulation signal.
Abstract:
Techniques and mechanisms to mitigate fixed pattern noise in image sensor data. In an embodiment, readout circuitry includes an adaptive analog-to-digital converter (ADC) comprising a differential amplifier and a feedback path coupled across the differential amplifier, where the ADC is to receive a ramp signal, a control signal associated with a transition rate of the ramp signal, and an analog signal generated by one or more pixels. In another embodiment, the feedback path and/or one or more other circuit elements coupled to the differential amplifier are configured, based on the control signal, to provide one of multiple loop gains with the differential amplifier. The ADC provides a digital output to determine a comparison based on the ramp signal and the analog signal.
Abstract:
A pixel array includes a plurality of visible light pixels arranged in the pixel array. Each one of the plurality of visible light pixels includes a photosensitive element arranged in a first semiconductor die to detect visible light. Each one of the plurality of visible light pixels is coupled to provide color image data to visible light readout circuitry disposed in a second semiconductor die stacked with and coupled to the first semiconductor die in a stacked chip scheme. A plurality of infrared (IR) pixels arranged in the pixel array. Each one of the plurality of IR pixels includes a single photon avalanche photodiode (SPAD) arranged in the first semiconductor die to detect IR light. Each one of the plurality of visible light pixels is coupled to provide IR image data to IR light readout circuitry disposed in the second semiconductor die.
Abstract:
An image sensor read out circuit includes a first current mirror circuit in which a second current conducted through a second current path is controlled in response to a first current conducted through the first current path. The second current is conducted through an amplifier transistor of a pixel circuit. A first current source is coupled to the first current path to provide a substantially constant current component of the first current. A second current source is coupled to a power supply rail of the pixel circuit and coupled to the first current path to provide a ripple current component of the first current. The ripple current component provided by the second current source is responsive to a ripple in the power supply rail. The first current is responsive to a sum of the currents from the first and second current sources.