Exception reduction and event reordering in an item tracking system
    51.
    发明授权
    Exception reduction and event reordering in an item tracking system 有权
    项目跟踪系统中的异常减少和事件重新排序

    公开(公告)号:US07331527B2

    公开(公告)日:2008-02-19

    申请号:US11025839

    申请日:2004-12-30

    IPC分类号: G06K7/10

    摘要: A current state of an item being tracked by an item-tracking system may be determined using prior state information about the item. To ensure proper temporal order of the state information, software events triggered by physical events associated with the item are received from a reader at an event interpretation system. A database or queue within the event interpretation system holds the software events for a delay time determined by a maximum transmission delay time of the software events. A sorter within the event interpretation system orders the software events relative to one another so as to correspond to an order of the physical events. An association model of the event interpretation system may determine state information related to the item for storage in a state information database. Accordingly, system exceptions in the item tracking system may be reduced, and an accuracy and reliability of the system may be improved.

    摘要翻译: 项目跟踪系统跟踪的项目的当前状态可以使用关于该项目的先前状态信息来确定。 为了确保状态信息的适当时间顺序,在事件解释系统从读取器接收与物品相关联的物理事件触发的软件事件。 事件解释系统内的数据库或队列保存由软件事件的最大传输延迟时间确定的延迟时间的软件事件。 事件解释系统内的分拣机相对于彼此订购软件事件,以对应于物理事件的顺序。 事件解释系统的关联模型可以确定与用于存储在状态信息数据库中的项目有关的状态信息。 因此,可以减少项目跟踪系统中的系统异常,并且可以提高系统的准确性和可靠性。

    Item tracking system architectures providing real-time visibility to supply chain
    53.
    发明授权
    Item tracking system architectures providing real-time visibility to supply chain 有权
    项目跟踪系统架构为供应链提供实时可见性

    公开(公告)号:US06901304B2

    公开(公告)日:2005-05-31

    申请号:US10232764

    申请日:2002-08-30

    摘要: Methods and apparatus, including computer program products, for providing multiple enterprises real-time access to information about items in a supply chain. Tags bound to items are read and information read from the tags and location information about the tags is provided by at least two enterprises and used to maintain disposition information about the items, which is made visible to enterprises in the supply chain. The tags can be radio-frequency identification tags having each having an ePC (electronic product code) as unique tag identifier. Visibility of the disposition information can be controlled through authorization. Visible information can include relationships between particular items and business documents such as order and shipping documents. With shipping documents visible, information read from item tags can be used to confirm the identify or completeness of a shipment.

    摘要翻译: 方法和设备,包括计算机程序产品,用于提供多个企业实时访问供应链中的项目信息。 标签绑定的标签被读取,从标签读取的信息和关于标签的位置信息由至少两个企业提供,并且用于维护关于供应链中的企业可见的项目的处置信息。 标签可以是具有ePC(电子产品代码)作为唯一标签标识符的射频识别标签。 处置信息的可见性可以通过授权来控制。 可见信息可以包括特定项目与业务单据之间的关系,例如订单和运输单据。 随着运输单据的显示,可从项目标签读取的信息用于确认货物的识别或完整性。

    Gamma correction using double mapping with ratiometrically-related segments of two different ratios
    54.
    发明授权
    Gamma correction using double mapping with ratiometrically-related segments of two different ratios 失效
    伽马校正使用双映射与两个不同比率的比率相关段

    公开(公告)号:US06791576B1

    公开(公告)日:2004-09-14

    申请号:US09511013

    申请日:2000-02-23

    申请人: Tao Lin

    发明人: Tao Lin

    IPC分类号: G09G500

    CPC分类号: G06T5/007 H04N5/202

    摘要: Gamma correction or other power functions are generated for correcting the light intensity for digital pixels. Two levels of mapping of segments are preformed to reduce the total number of segments for a given precision. The range of inputs is divided into successively smaller segments. Each segment is smaller than the next by a factor of 1/a for a first or primary level, or 1/b for a second level of segments. All inputs are mapped or scaled up to the input range of the largest segment in the primary level. Then the largest primary segment is further divided into several second-level segments, and the input is again mapped or scaled into the largest of the second-level segments. Gamma correction is performed on the input scaled into the largest second-level segment. A linear approximation within the largest second-level segment is used. The result is de-mapped or scaled down from the largest second-level segment to the actual second-level segment, then it is scaled down from the largest primary-level segment to the actual primary-level segment for the original input. Smaller priority encoders and shifters and simplified de-mapping circuits can be used, saving logic.

    摘要翻译: 产生伽马校正或其他功率函数用于校正数字像素的光强度。 执行两个级别的映射以减少给定精度的段的总数。 输入范围分为连续较小的段。 每个段对于第一级或初级级别小于下一级的1 / a,或者对于第二级段的1 / b。 所有输入都被映射或放大到主级中最大段的输入范围。 然后,最大的主段被进一步划分成几个第二级段,并且输入被再次映射或缩放到最大的二级段中。 对缩放到最大的二级段的输入进行伽马校正。 使用最大二级段内的线性近似。 结果是从最大的第二级段被去映射或缩小到实际的第二级段,然后从原始输入的最大主级段被缩小到实际的主级段。 可以使用较小优先级的编码器和移位器和简化的去映射电路,从而节省逻辑。

    Sum-of-absolute-difference calculator for motion estimation using inversion and carry compensation with full and half-adders
    55.
    发明授权
    Sum-of-absolute-difference calculator for motion estimation using inversion and carry compensation with full and half-adders 有权
    使用反演和运动补偿的全加和半加法运动估计的绝对差绝对差计算器

    公开(公告)号:US06473529B1

    公开(公告)日:2002-10-29

    申请号:US09432367

    申请日:1999-11-03

    申请人: Tao Lin

    发明人: Tao Lin

    IPC分类号: G06K936

    CPC分类号: G06F7/544 G06F2207/5442

    摘要: A specialized Sum-of-Absolute-Difference (SAD) calculator for motion estimation uses inversion rather than 2's complementing. The absolute-value operation of each pixel-pair difference is performed by a bit-wise inversion rather than a complement. This reduces delay since the adder/incrementer propagation is eliminated. The increment needed to adjust for inversion rather than 2's complementing is accomplished by using the carry inputs to the summing and final adders that generate the sum of the absolute differences. When 2-input final adders are used for summing, a total of k−1 adders are used to sum k absolute differences. One additional increment is needed since only k−1 adders are available. A reduced half-adder rather than a full adder is inserted between the summing and final adder for this remaining increment. Propagation of carries between bit positions in a full adder can be avoided using the half adder. The final adder generates the final sum (the SAD) by adding the sum and carry bits from the half-adder array and propagating the carries.

    摘要翻译: 用于运动估计的专门的绝对差值(SAD)计算器使用反演而不是2的补码。 每个像素对差的绝对值运算通过逐位倒置而不是补码来执行。 这减少了延迟,因为加法器/递增器传播被消除。 通过使用产生绝对差的和的求和和最终加法器的进位输入来实现调整反转而不是2的补码所需的增量。 当使用2输入的最终加法器进行求和时,总共使用k-1个加法器来求和k个绝对差。 需要增加一个增量,因为只有k-1加法器可用。 在该剩余增量的加法和最终加法器之间插入减法的半加法器而不是全加器。 使用半加法器可以避免在全加器中的位位置之间传输的传播。 最后的加法器通过将加法和加和来自半加法器阵列的位进行加法生成最终和(SAD)并传播运算。

    Hierarchical motion estimation with levels of varying bit width for digital video compression
    56.
    发明授权
    Hierarchical motion estimation with levels of varying bit width for digital video compression 有权
    用于数字视频压缩的具有不同位宽度的级别的分层运动估计

    公开(公告)号:US06421466B1

    公开(公告)日:2002-07-16

    申请号:US09408339

    申请日:1999-09-29

    申请人: Tao Lin

    发明人: Tao Lin

    IPC分类号: G06K936

    CPC分类号: H04N19/186 H04N19/53

    摘要: Digital-video compression uses motion vectors to encode movement of macroblocks from one image to another image in a sequence of images. Motion vectors are estimated using multiple levels of a picture, with higher levels having lower resolutions. Such hierarchical or pyramid motion estimation generates lower-resolution pictures from the full-resolution picture. A selected macroblock in a reference picture is compared to ranges in each successively-higher-resolution level. Rather than store the levels of a picture as full pixels, only a luminance Y component of a YUV pixel is stored and used for motion estimation. Further memory savings is achieved by reducing the width of the Y pixels from 8 bits to 6 bits for the top and bottom levels, and to 4 bits for intermediate levels of the picture. Pixels are reduced in width by storing only the most-significant-bits (MSBs), or by dithering. Motion estimation searches in each level are performed using pictures with reduced-width pixels. More bits are used in pixels for the top (lowest-resolution) and bottom (full resolution) level pictures for improved accuracy in the initial and final motion vectors. Fewer bits are used in pixels of the intermediate levels to reduced storage requirements.

    摘要翻译: 数字视频压缩使用运动矢量来编码宏块从一幅图像到另一幅图像序列中的移动。 使用多个图像级别来估计运动矢量,其中较高的分辨率具有较低的分辨率。 这种分级或金字塔运动估计从全分辨率图像生成较低分辨率的图像。 将参考图像中的选定宏块与每个连续更高分辨率级别的范围进行比较。 不是将图像的电平存储为全像素,而是仅存储YUV像素的亮度Y分量并将其用于运动估计。 通过将Y像素的宽度从顶部和底部的8位减少到6位,并将图像的中间级别降低到4位来实现更多的存储器节省。 通过仅存储最高有效位(MSB)或抖动来减小像素的宽度。 使用具有较小宽度像素的图像来执行每个级别中的运动估计搜索。 更高的位用于顶部(最低分辨率)和底部(全分辨率)级别图像的像素,以提高初始和最终运动矢量的精度。 在中间级别的像素中使用较少的位来减少存储要求。

    3D triangle rendering by texture hardware and color software using
simultaneous triangle-walking and interpolation for parallel operation
    57.
    发明授权
    3D triangle rendering by texture hardware and color software using simultaneous triangle-walking and interpolation for parallel operation 失效
    纹理硬件和彩色软件采用同时三角行走和插值进行并行操作的3D三角渲染

    公开(公告)号:US6016151A

    公开(公告)日:2000-01-18

    申请号:US928291

    申请日:1997-09-12

    申请人: Tao Lin

    发明人: Tao Lin

    IPC分类号: G06T15/87 G06T15/60

    CPC分类号: G06T15/87

    摘要: A 3D graphics accelerator operates in parallel with a host central processing unit (CPU). Software executing on the host CPU performs transformation and lighting operations on 3D-object primitives such as triangles, and generates gradients across the triangle for red, green, blue, Z-depth, alpha, fog, and specular color components. The gradients for texture attributes are also generated and sent to the graphics accelerator. Both the graphics accelerator and the CPU software perform triangle edge and span walking in synchronization to each other. The CPU software walks the triangle to interpolate non-texture color and depth attributes, while the graphics accelerator walks the triangle to interpolate texture attributes. The graphics accelerator performs a non-linear perspective correction and reads a texture pixel from a texture map. The texture pixel is combined with a color pixel that is received from the CPU software interpolation of non-texture attributes. Once the texture pixel from the graphics accelerator and the color pixel from the CPU software are sent to a blender in the graphics accelerator, both continue to interpolate the next pixel in the horizontal-line span, or move to a pixel in the next span. Both the CPU software and the graphics accelerator interpolate the same pixel at the same time. Using both the CPU and the graphics accelerator improves performance since both operate in parallel on the same pixel at the critical interpolation bottleneck.

    摘要翻译: 3D图形加速器与主机中央处理单元(CPU)并行操作。 在主机CPU上执行的软件对三维对象原语(如三角形)执行变换和点亮操作,并在三角形上生成红色,绿色,蓝色,Z深度,α,雾和镜面颜色分量的渐变。 纹理属性的渐变也被生成并发送到图形加速器。 图形加速器和CPU软件都可以相互同步执行三角形边缘和跨度行走。 CPU软件走三角形内插非纹理颜色和深度属性,而图形加速器走三角形来插值纹理属性。 图形加速器执行非线性透视校正,并从纹理图读取纹理像素。 纹理像素与从非软纹理属性的CPU软件插值接收的颜色像素组合。 一旦来自图形加速器的纹理像素和来自CPU软件的颜色像素被发送到图形加速器中的混合器,则两者都继续插入水平线跨度中的下一个像素,或者移动到下一个跨度中的像素。 CPU软件和图形加速器同时插入相同的像素。 使用CPU和图形加速器可以提高性能,因为它们在关键内插瓶颈时在同一像素上并行运行。

    Anti-aliasing method for polynomial curves using integer arithmetics
    58.
    发明授权
    Anti-aliasing method for polynomial curves using integer arithmetics 失效
    使用整数算术的多项式曲线的抗锯齿方法

    公开(公告)号:US5479590A

    公开(公告)日:1995-12-26

    申请号:US302041

    申请日:1994-09-07

    申请人: Tao Lin

    发明人: Tao Lin

    IPC分类号: G06T11/20 G06T11/00

    CPC分类号: G06T11/203

    摘要: A method of performing anti-aliasing on polynomial curves using only integer arithmetic. The anti-aliasing method includes the steps of: defining an polynomial equation of a curve, dividing grid units into an finite number of sub-intervals, associating a mix ratio to each of the sub-intervals, determining which sub-interval the curve bisects, assigning a mix ratio to each picture element bordering the grid unit according to the mix ratio associated with the sub-interval determined to be bisected by the curve.

    摘要翻译: 仅使用整数运算在多项式曲线上执行抗锯齿的方法。 抗锯齿方法包括以下步骤:定义曲线的多项式方程,将网格单位划分为有限数量的子间隔,将混合比与每个子间隔相关联,确定曲线平分的哪个子间隔 根据与被确定为被曲线平分的子间隔相关联的混合比,为与网格单元相邻的每个图像元素分配混合比。

    Tracing and discovering the origins and genealogy of install errors
    59.
    发明授权
    Tracing and discovering the origins and genealogy of install errors 有权
    追踪和发现安装错误的起源和家谱

    公开(公告)号:US09367383B2

    公开(公告)日:2016-06-14

    申请号:US14498179

    申请日:2014-09-26

    IPC分类号: G06F11/07 G06F17/30

    摘要: The disclosure generally describes computer-implemented methods, software, and systems for presenting error information. An indication is received of a selected error for a product installation. Installations are identified having a matching stream, build number and error. Other builds in a same stream having the same error are identified. Information is provided for displaying a graph having a horizontal line graph including first nodes representing builds in the same stream having the same error. Other occurrences of the error in builds of other streams are identified. Information for updating the graph is provided with parallel lines for each of the other streams, each parallel line including second nodes representing builds. An oldest one of the first nodes and second nodes is identified. Information is provided for presenting a list of potential changes occurring before the date associated with the oldest node and that are candidates for causing the error.

    摘要翻译: 本公开一般地描述了用于呈现错误信息的计算机实现的方法,软件和系统。 收到产品安装所选错误的指示。 识别出具有匹配流,构建号和错误的安装。 识别具有相同错误的相同流中的其他构建。 提供了用于显示具有水平线图的图形的信息,其包括表示具有相同错误的相同流中的构建的第一节点。 识别其他流的构建中的错误的其他出现。 用于更新图形的信息具有用于每个其他流的并行线,每个并行线包括表示构建的第二节点。 识别第一个节点和第二个节点中最古老的节点和第二个节点。 提供信息用于呈现在与最旧节点相关联的日期之前发生的潜在变化的列表,并且是用于引起错误的候选者。