公开(公告)号：US11239142B2

公开(公告)日：2022-02-01

申请号：US16656879

申请日：2019-10-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Fan Huang ,  Hsiang-Ku Shen ,  Hui-Chi Chen ,  Tien-I Bao ,  Dian-Hau Chen ,  Yen-Ming Chen

IPC分类号： H01L23/495 ,  H01L23/522 ,  H01L23/48

摘要： A package structure and method for forming the same are provided. The package structure includes a conductive layer formed over a first substrate, and a dielectric layer formed over the conductive layer. The package structure includes a metal-insulator-metal (MIM) capacitor embedded in the dielectric layer, and a shielding layer formed over the MIM capacitor. The shielding layer is insulated from the MIM capacitor by the dielectric layer. The package structure also includes a first through via formed through the MIM capacitor, and the first through via is connected to the conductive layer, and the first through via is insulated from the shielding layer.

公开(公告)号：US20210398896A1

公开(公告)日：2021-12-23

申请号：US17466013

申请日：2021-09-03

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Yuan-Yang Hsiao ,  Hsiang-Ku Shen ,  Dian-Hau Chen

IPC分类号： H01L23/522 ,  H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/528 ,  H01L49/02

摘要： Semiconductor devices, integrated circuits and methods of forming the same are provided. In one embodiment, a semiconductor device includes a metal-insulator-metal structure which includes a bottom conductor plate layer including a first opening and a second opening, a first dielectric layer over the bottom conductor plate layer, a middle conductor plate layer over the first dielectric layer and including a third opening, a first dummy plate disposed within the third opening, and a fourth opening, a second dielectric layer over the middle conductor plate layer, and a top conductor plate layer over the second dielectric layer and including a fifth opening, a second dummy plate disposed within the fifth opening, a sixth opening, and a third dummy plate disposed within the sixth opening. The first opening, the first dummy plate, and the second dummy plate are vertically aligned.

公开(公告)号：US11056556B2

公开(公告)日：2021-07-06

申请号：US16439385

申请日：2019-06-12

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsiang-Ku Shen ,  Ming-Hong Kao ,  Hui-Chi Chen ,  Dian-Hau Chen ,  Yen-Ming Chen

IPC分类号： H01L49/02

摘要： A method of fabricating a metal-insulator-metal (MIM) capacitor structure includes forming a bottom electrode, forming a first oxide layer adjacent the bottom electrode, and depositing a first high-k dielectric layer over the bottom electrode and the first oxide layer. A middle electrode is then formed over the first high-k dielectric layer and a second oxide layer is formed adjacent the middle electrode. A second high-k dielectric layer may be deposited over the middle electrode and the second oxide layer and a top electrode over the second high-k dielectric layer.

公开(公告)号：US20210159224A1

公开(公告)日：2021-05-27

申请号：US16697797

申请日：2019-11-27

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Hsiang-Ku Shen ,  Ying-Ju Chen ,  Hsien-Wei Chen

IPC分类号： H01L27/06 ,  H01L23/522 ,  H01L23/00 ,  H01L23/48 ,  H01L49/02 ,  H01L21/78 ,  H01L25/065 ,  H01L25/00

摘要： A device includes a first die and a second die. The first die includes: a first substrate that contains first electrical circuitry, a first interconnection structure disposed over the first substrate, a first dielectric layer disposed over the first interconnection structure, and a plurality of first bonding pads disposed over the first dielectric layer. The second die includes: a second substrate that contains second electrical circuitry, a second interconnection structure disposed over the second substrate, a second dielectric layer disposed over the second interconnection structure, and a plurality of second bonding pads disposed over the second dielectric layer. The first bonding pads of the first die are bonded to the second bonding pads of the second die. At least one of the first die or the second die includes a metal-insulator-metal (MIM) capacitor. The MIM capacitor includes more than two metal layers that are stacked over one another.

公开(公告)号：US10734474B2

公开(公告)日：2020-08-04

申请号：US16156779

申请日：2018-10-10

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chih-Fan Huang ,  Hung-Chao Kao ,  Yuan-Yang Hsiao ,  Tsung-Chieh Hsiao ,  Hsiang-Ku Shen ,  Hui-Chi Chen ,  Dian-Hau Chen ,  Yen-Ming Chen

IPC分类号： H01L49/02 ,  H01L27/22 ,  H01L21/311

摘要： A metal-insulator-metal (MIM) capacitor structure includes a semiconductor substrate and a bottom conductive layer above the semiconductor substrate. The bottom conductive layer has a slanted sidewall with respect to a top surface of the semiconductor substrate. The MIM capacitor structure further includes a top conductive layer above the bottom conductive layer. The top conductive layer has a vertical sidewall with respect to the top surface of the semiconductor substrate. The MIM capacitor structure further includes an insulating layer interposed between the bottom conductive layer and the top conductive layer. The insulating layer covers the slanted sidewall of the bottom conductive layer.