Display device and method of driving the same

    公开(公告)号:US11887525B2

    公开(公告)日:2024-01-30

    申请号:US17810141

    申请日:2022-06-30

    Abstract: A display device includes PAM data lines receiving PAM and PWM data voltages, and sub-pixels connected to the PAM and PWM data lines. A sub-pixel includes a light emitting element, a first pixel driver to supply a control current according to one of the PAM data voltages to a node, a second pixel driver to generate a driving current according to one of the PWM data voltages, and a third pixel driver to adjust a period during which the driving current is supplied to the light emitting element according to a voltage of the node. A peak current value of the driving current when the sub-pixel emits a light corresponding to a low gray level region is smaller than a peak current value of the driving current when the sub-pixel emits a light corresponding to a high gray level region higher than the low gray level region.

    Sweep signal driver and display device including the same

    公开(公告)号:US11869415B2

    公开(公告)日:2024-01-09

    申请号:US17719930

    申请日:2022-04-13

    Abstract: A sweep signal driver includes: a kth stage to output a kth emission signal to a kth emission line, and a kth sweep signal to a kth sweep signal line, the kth stage including: first, second, and third pull-up nodes; a node connection circuit between the first pull-up node and the second pull-up node, and between the first pull-up node and the third pull-up node; a first output circuit to output a sweep clock signal of a sweep clock terminal to a first output terminal connected to the kth sweep signal line when the third pull-up node has a gate-on voltage; and a second output circuit to output a gate-on voltage to a second output terminal connected to the kth emission line when the second pull-up node has a gate-on voltage. A pulse of the kth sweep signal linearly changes from a gate-off voltage to the gate-on voltage.

    Display device having a pixel driver with a pulse width modulation and a pulse amplitude modulation signals

    公开(公告)号:US11837156B2

    公开(公告)日:2023-12-05

    申请号:US17807690

    申请日:2022-06-17

    CPC classification number: G09G3/32 G09G2320/0633

    Abstract: A display device includes a scan write line, a PWM emission line, a PAM emission line, a sweep signal line, a first data line, a second data line, and a subpixel connected thereto, and including a light emitting element, a first pixel driver to supply a control current to a node according to the first data voltage in response to the PWM emission signal, a second pixel driver to generate a driving current according to the second data voltage in response to the PWM emission signal, and a third pixel driver to supply the driving current to the light emitting element according to the PAM emission signal and a voltage of the node, wherein the PWM emission signal includes a plurality of PWM pulses, the PAM emission signal includes a plurality of PAM pulses, and a number of the PWM pulses is greater than a number of the PAM pulses.

    Scan driver and display device
    55.
    发明授权

    公开(公告)号:US11694627B2

    公开(公告)日:2023-07-04

    申请号:US17569058

    申请日:2022-01-05

    Inventor: Hyun Joon Kim

    Abstract: A scan driver includes stages, each of the stages receiving first and second clock signals having a first low level as an active level, and a third clock signal having a high level as the active level. Each of the stages includes a logic circuit that changes a voltage of a first node to the first low level based on an input signal and the first clock signal, and changes a voltage of the first node to a second low level lower than the first low level based on the second clock signal, a first output buffer that outputs, as an active-low scan signal, the second clock signal in response to the voltage of the first node, and a second output buffer that outputs, as an active-high scan signal, the third clock signal in response to the voltage of the first node.

    Display device
    56.
    发明授权

    公开(公告)号:US11688331B2

    公开(公告)日:2023-06-27

    申请号:US17849299

    申请日:2022-06-24

    Abstract: A display device includes: a first pixel driver to generate a control current; a second pixel driver to generate a driving current, and control a period during which the driving current flows, based on the control current; and a light-emitting element connected to the second pixel driver to receive the driving current. The first pixel driver includes: a first transistor to generate the control current based on a first data voltage; and a second transistor to provide the first data voltage to a first electrode of the first transistor based on a scan write signal from a scan write line. The second pixel driver includes: a third transistor to generate the driving current based on the control current; and a fourth transistor to provide a second data voltage to a first electrode of the third transistor based on a scan write signal from the scan write line.

    Pixel circuit
    57.
    发明授权

    公开(公告)号:US11562682B2

    公开(公告)日:2023-01-24

    申请号:US16924050

    申请日:2020-07-08

    Abstract: A pixel circuit includes: a first transistor including a gate electrode connected to a first node, a source electrode connected to a first power line, and a drain electrode connected to a second power line; a light emitting element connected between the first transistor and the first or second power line; a second transistor connected between a data line and the first node, and including a gate electrode connected to a first scan line; a first capacitor connected between the first node and the source electrode of the first transistor; a third transistor connected between the first node and the first power line, and including a gate electrode connected to a second node; a fourth transistor connected between the second node and the data line, and including a gate electrode connected to a second scan line; and a second capacitor connected between the second node and a first control line.

    PIXEL AND A DISPLAY DEVICE HAVING THE SAME

    公开(公告)号:US20220366852A1

    公开(公告)日:2022-11-17

    申请号:US17875601

    申请日:2022-07-28

    Abstract: A pixel including: a light emitting element; a first transistor connected between a first power source and a second node; a first capacitor connected to a first node or a second node and a third node; a second transistor between the third node and a data line, the second transistor turned on by a first scan signal; a third transistor between the first and second nodes, the third transistor turned on by a second scan signal; a fifth transistor between the first power source and the first transistor, the fifth transistor turned on by a first emission control signal; a sixth transistor between the second node and the light emitting element, the sixth transistor turned on by a second emission control signal; and an eighth transistor between the second node and a second emission control line, the eighth transistor turned on by a fourth scan signal.

    LIGHT-EMITTING DISPLAY DEVICE AND PIXEL THEREOF

    公开(公告)号:US20220172682A1

    公开(公告)日:2022-06-02

    申请号:US17675406

    申请日:2022-02-18

    Abstract: A pixel of a light-emitting display device includes a capacitor, a first transistor, a second transistor including a gate receiving a gate writing signal, a third transistor including a gate receiving a scan signal, a fourth transistor including a gate receiving a gate initialization signal, a fifth transistor including a gate receiving a first emission signal, a sixth transistor including a gate receiving a second emission signal, and a light-emitting diode. The scan signal and the gate writing signal may be provided at a first frequency, and the first emission signal, the second emission signal and the gate initialization signal may be provided at a second frequency higher than the first frequency.

    Scan driver and display device
    60.
    发明授权

    公开(公告)号:US11222596B2

    公开(公告)日:2022-01-11

    申请号:US16938408

    申请日:2020-07-24

    Inventor: Hyun Joon Kim

    Abstract: A scan driver includes stages, each of the stages receiving first and second clock signals having a first low level as an active level, and a third clock signal having a high level as the active level. Each of the stages includes a logic circuit that changes a voltage of a first node to the first low level based on an input signal and the first clock signal, and changes a voltage of the first node to a second low level lower than the first low level based on the second clock signal, a first output buffer that outputs, as an active-low scan signal, the second clock signal in response to the voltage of the first node, and a second output buffer that outputs, as an active-high scan signal, the third clock signal in response to the voltage of the first node.

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