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公开(公告)号：US20210201807A1
公开(公告)日：2021-07-01
申请号：US16766450
申请日：2019-11-04
Inventor： Xuehuan FENG , Yongqian LI , Can YUAN , Meng LI , Zehua DING , Zhidong YUAN
IPC: G09G3/3266 , G09G3/3225 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-unit and a leakage prevention circuit; the first sub-unit includes a first input circuit and a first output circuit. The first input circuit controls a level of a first node in response to a first input signal, the first output circuit provides an output signal at an output terminal under control of the level of the first node, the leakage prevention circuit is connected to the first node and a first voltage terminal, and controls a level of a leakage prevention node under control of the level of the first node, whereby a conductive path is formed between the leakage prevention node and the first voltage terminal, and a circuit connected between the first node and the leakage prevention node is turned off.
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52.发明申请公开(公告)号：US20210150988A1
公开(公告)日：2021-05-20
申请号：US16642469
申请日：2019-07-29
Inventor： Zhidong YUAN , Yongqian LI , Meng LI , Can YUAN
IPC: G09G3/3266 , G11C19/28
Abstract: The present disclosure discloses a shift register, a driving method thereof, a gate drive circuit, an array substrate and a display device. With a signal control circuit, a branch control circuit, a cascade signal output circuit and at least two scan signal output circuits, each shift register can output at least two scan signals to correspond to different gate lines in a display panel. This can reduce the number of shift registers in a gate drive circuit and the space occupied by the gate drive circuit and can achieve an ultra-narrow frame design, as compared with an existing shift register that can only output one scan signal. Moreover, as signals of different output control node do not influence each other, the output stability can also be improved.
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公开(公告)号：US20210125568A1
公开(公告)日：2021-04-29
申请号：US17081384
申请日：2020-10-27
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G3/3291
Abstract: The present disclosure provides a display panel, a method thereof and a display device. The display panel includes a gate line group, a gate driving circuit, and a sub-pixel unit group. The sub-pixel unit group includes N rows of sub-pixel units, the gate line group includes (N+1) gate lines. The sub-pixel unit includes a light emitting unit, a pixel driving circuit, and a sensing circuit. The gate driving circuit includes output terminals, and is configured to sequentially output gate scanning signals through the output terminals. Each gate line is coupled to one corresponding output terminal. In the sub-pixel unit group, the pixel driving circuit in a sub-pixel unit in an n-th row is coupled to an n-th gate line; and the sensing circuit in the sub-pixel unit in the n-th row is coupled to a (n+1)-th gate line, where 1≤n≤N, and n is an integer.
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公开(公告)号：US20210074210A1
公开(公告)日：2021-03-11
申请号：US16840176
申请日：2020-04-03
Inventor： Zhidong YUAN , Taejin KIM , Yongqian LI , Lin SUN , Chao JIAO , Can YUAN , Zehua DING , Xuehuan FENG , Meng LI
IPC: G09G3/3233
Abstract: A pixel driving circuit, array substrate, display device and method for driving the pixel driving circuit are provided, the circuit includes: a control terminal and a first terminal of a driving switch circuit are respectively coupled to a first terminal of a data input switch circuit and an anode of a light-emitting device, and two terminals of a storage capacitor are respectively coupled to the control terminal of the driving switch circuit and the anode of the light-emitting device, two terminals of an intrinsic capacitor are respectively coupled to a cathode and the anode of the light-emitting device, a first terminal and a second terminal of a reset switch circuit are respectively coupled to the anode and the cathode of the light-emitting device, a capacitance of the intrinsic capacitor is greater than or equal to a preset multiple of a capacitance of the storage capacitor.
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公开(公告)号：US20250078744A1
公开(公告)日：2025-03-06
申请号：US18250175
申请日：2022-04-20
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN
IPC: G09G3/3233 , G09G3/3266
Abstract: A light-emitting control circuit includes: a first detection control unit configured to transmit a first voltage signal to the first node under control of a detection control signal and a first clock signal; a first light-emitting output unit configured to transmit the first voltage signal to a first output signal terminal under control of a voltage of the first node; a second detection control unit configured to transmit the first voltage signal to a second node under control of the detection control signal and a second clock signal; and a second light-emitting output unit configured to transmit the first voltage signal to a second output signal terminal under control of a voltage of the second node.
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Patent Agency Ranking
公开(公告)号：US20250061851A1
公开(公告)日：2025-02-20
申请号：US18554822
申请日：2023-01-12
Inventor： Zhidong YUAN , Pan XU , Yongqian LI , Can YUAN
IPC: G09G3/3233
Abstract: A pixel circuit and a driving method thereof, and a display device are disclosed. The pixel circuit includes a driving circuit, a data writing circuit, a reset circuit, a light-emitting control circuit and a light-emitting element. The driving circuit includes a control terminal, a first terminal and a second terminal; the data writing circuit is connected to a first node to apply a data voltage; the reset circuit is connected to the first node to apply a reference voltage. The pixel circuit further includes a partition control circuit, which is connected to the first node and the control terminal, and is configured to apply the data voltage and the reference voltage to the control terminal; the reset circuit is connected to one of the first terminal and the second terminal of the driving circuit, and the reset circuit is further configured to apply an initialization voltage to the driving circuit.
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公开(公告)号：US20250037662A1
公开(公告)日：2025-01-30
申请号：US18918667
申请日：2024-10-17
Inventor： Yongqian LI , Can YUAN , Zhongyuan WU
IPC: G09G3/3233 , H10K59/131
Abstract: A display substrate and a display panel are provided. The display substrate includes: a base substrate; and a plurality of sub-pixels. Each sub-pixel includes a light-emitting element and a pixel circuit; the pixel circuit includes a driving circuit, a data writing circuit, a first control circuit, a second control circuit, and a light-emitting control circuit; the driving circuit is configured to control the driving current flowing through the light-emitting element; the light-emitting control circuit is configured to apply the driving current to the light-emitting element; the first control circuit is configured to write a reference voltage into the driving circuit; the second control circuit is configured to write an initial voltage into the first electrode of the light-emitting element; and orthographic projections of at least part of pixel circuits of every two adjacent sub-pixels in a same row of sub-pixels on the base substrate are mirror-symmetrical.
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公开(公告)号：US20250014520A1
公开(公告)日：2025-01-09
申请号：US18272595
申请日：2022-07-28
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Liu WU , Luke DING , Cheng XU , Miao LIU , Xing YAO
IPC: G09G3/3266 , G11C19/28
Abstract: Provided is a gate driver circuit. The gate driver circuit is applicable to a display panel, wherein the display panel includes a plurality of rows of pixels; the gate driver circuit including at least one gate driver sub-circuit; wherein the gate driver sub-circuit includes: at least two shift register groups, wherein each shift register group includes a plurality of shift register units; at least two first dummy units, wherein the at least two first dummy units are respectively coupled to a same input enable terminal and the at least two shift register groups; and at least two second dummy units, wherein the at least two second dummy units are coupled to the at least two shift register groups.
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公开(公告)号：US20240296793A1
公开(公告)日：2024-09-05
申请号：US18026827
申请日：2022-06-14
Inventor： Can YUAN , Yongqian LI , Zhidong YUAN
IPC: G09G3/3233 , H10K59/131
CPC classification number: G09G3/3233 , H10K59/131 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2310/08
Abstract: Provided is a display panel. The display panel includes: a substrate; a plurality of first control lines and a plurality of second control lines on a side of the substrate; and a plurality of subpixels arranged in an array on the side of the substrate, wherein at least two of the plurality of subpixels share a first node; wherein the subpixel includes a first circuit and a second circuit, the first circuit and the second circuit being configured to control a voltage at the first node in response to a first control signal and a second control signal; wherein in the display panel, a sum of a number of the plurality of first control lines and a number of the plurality of second control lines is less than or equal to a number of the subpixels in a column direction.
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公开(公告)号：US20240169925A1
公开(公告)日：2024-05-23
申请号：US17779164
申请日：2021-03-29
Inventor： Zhidong YUAN , Pan XU , Yongqian LI , Can YUAN , Zhongyuan WU
IPC: G09G3/3266 , G09G3/32 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/32 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G11C19/28
Abstract: A display panel includes sub-pixels and a scan driving circuit. The scan driving circuit includes a plurality of stages of shift registers including at least one first shift register and at least one second shift register, and a plurality of clock signal lines including at least one first sub-clock signal line and at least one second sub-clock signal line. Each shift register includes a first sub-circuit and a second sub-circuit. A first sub-clock signal line in the at least one first sub-clock signal line is electrically connected to a first sub-circuit in a first shift register in the at least one first shift register. A second sub-clock signal line in the at least one second sub-clock signal line is electrically connected to one sub-circuit of a first sub-circuit and a second sub-circuit in a second shift register in the at least one second shift register.
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