公开(公告)号：US5938747A

公开(公告)日：1999-08-17

申请号：US816980

申请日：1997-03-13

申请人： B. Arlen Young

发明人： B. Arlen Young

IPC分类号： G06F13/12 ,  G06F15/167

CPC分类号： G06F13/126

摘要： A method for queuing hardware control blocks, such as SCBs, for a system including a system processor coupled to a plurality of host adapter devices and a buffer memory controller device by an I/O bus is based on use of an endless new hardware command block queue, and an endless done hardware command block queue. The hardware command blocks for a plurality of devices, where each device includes a device processor, are managed by forming an endless queue for a device in a memory external to the device. A first pointer to the endless queue is maintained in a memory that is not within the memory space of the device processor. A second pointer to the endless queue is maintained in a memory addressable by the device processor. The first and second pointers address the head and tail hardware command block array sites of the endless queue.

摘要翻译： 用于对包括通过I / O总线耦合到多个主机适配器设备的系统处理器和缓冲存储器控制器设备的系统的系统排队硬件控制块（例如SCB）的方法基于使用无尽的新硬件命令块 队列和无尽的完成硬件命令块队列。 通过为设备外部的存储器中的设备形成无限队列来管理多个设备的硬件命令块，其中每个设备包括设备处理器。 指向无限队列的第一个指针被保存在不在设备处理器的存储器空间内的存储器中。 指向无限队列的第二个指针被保存在由设备处理器寻址的存储器中。 第一个和第二个指针解决了无尽队列的头部和尾部硬件命令块阵列站点。

公开(公告)号：US5797034A

公开(公告)日：1998-08-18

申请号：US616836

申请日：1996-03-15

申请人： B. Arlen Young

发明人： B. Arlen Young

IPC分类号： G06F13/12 ,  G06F13/14

CPC分类号： G06F13/126

摘要： An I/O command block, that is stored in a memory, includes information for connecting the I/O command block to other I/O command blocks in a chain structure. The I/O command block chain structure allows simultaneity of execution, provides a mechanism to inhibit and enable execution of an individual I/O command block, and a mechanism for establishing precedence in the sequence of execution of the I/O command blocks. This level of capability is provided by only information in the I/O command blocks within the chain. In this method, an abort bit in each of the one and another I/O command blocks is set and an aborted bit is reset in each of the one and another I/O command blocks. Upon execution of the one and another I/O command blocks, in one embodiment, the execution of that I/O command block first initiating data transfer sets the aborted bit in the I/O command block pointed to by the offshoot block pointer in the I/O command block first initiating data transfer. After the aborted bit is set, the I/O command block is aborted at the next opportunity during execution of the I/O command block when the state of the aborted bit is checked.

摘要翻译： 存储在存储器中的I / O命令块包括用于将I / O命令块连接到链结构中的其它I / O命令块的信息。 I / O命令块链结构允许执行的同时性，提供抑制和实现单个I / O命令块的执行的机制，以及用于在执行I / O命令块的顺序中建立优先级的机制。 该级别的能力仅由链中的I / O命令块中的信息提供。 在该方法中，设置一个和另一个I / O命令块中的每一个中的中止位，并且在一个和另一个I / O命令块中的每一个中复位异常位。 在一个和另一个I / O命令块的执行中，在一个实施例中，该I / O命令块的执行首先发起数据传输，将在该区域指针中指向的I / O命令块中的中止位设置在 I / O命令块首先启动数据传输。 在中断位置1之后，当执行I / O命令块时，I / O命令块在下一个机会被中止，当中止位的状态被选中时。

公开(公告)号：US5625800A

公开(公告)日：1997-04-29

申请号：US269491

申请日：1994-06-30

申请人： Michael D. Brayton ,  Charles S. Fannin ,  B. Arlen Young

发明人： Michael D. Brayton ,  Charles S. Fannin ,  B. Arlen Young

IPC分类号： G06F13/38 ,  G06F13/12 ,  G06F13/14

CPC分类号： G06F13/387

摘要： The performance of a host adapter integrated circuit is enhanced by storing blocks of information for SCSI I/O target commands, i.e, hardware request blocks, in a structure external to the host adapter integrated circuit. Since the number of blocks that is stored in the external structure is typically significantly greater than the number of blocks that can be stored in onboard registers of the host adapter integrated circuit, a high speed method for retrieving information from a particular block within the external structure is provided so that the appropriate block of information can be passed to the host adapter integrated circuit without delays associated with serially scanning through all of the blocks. Several structures are used in the external memory to manage the hardware request blocks. The structures include a hardware request block array, a hardware request block address array, a queue-in FIFO structure, a queue-out FIFO structure and a busy targets table.

摘要翻译： 主机适配器集成电路的性能通过将SCSI I / O目标命令（即硬件请求块）的信息块存储在主机适配器集成电路外部的结构中来增强。 由于存储在外部结构中的块的数量通常显着大于可以存储在主机适配器集成电路的板载寄存器中的块的数量，所以用于从外部结构中的特定块检索信息的高速方法 被提供使得适当的信息块可以被传递到主机适配器集成电路，而没有与通过所有块的串行扫描有关的延迟。 在外部存储器中使用几种结构来管理硬件请求块。 这些结构包括硬件请求块阵列，硬件请求块地址阵列，队列FIFO结构，队列FIFO结构和繁忙的目标表。

公开(公告)号：US5564023A

公开(公告)日：1996-10-08

申请号：US269463

申请日：1994-06-30

申请人： B. Arlen Young

发明人： B. Arlen Young

IPC分类号： G06F13/10 ,  G06F13/00

CPC分类号： G06F13/10

摘要： A busy targets table is created in a memory that can be either internal or external to a SCSI host adapter. Each entry in the table initially is set to a predetermined value. Prior to starting execution of each hardware request block, the host adapter performs a check to determine whether the hardware request block can be executed at this time by generating an offset into the busy targets table using a target address in the hardware request block. The host adapter then checks the entry in the busy targets table at the location of the offset. If the entry in the busy targets table at the location of the offset is the predetermined value, the device at the target address, i.e., the target, is available. Therefore, the execution of the hardware request block can proceed and so the host adapter overwrites the predetermined value at the offset in the table with a pointer to a storage location of said SCSI hardware request block and continues executing the hardware request block. If the target disconnects from the host adapter, the busy targets table is used to locate the appropriate hardware request block when the target reconnects to the host adapter. Specifically, the host adapter generates an offset into the busy targets table using target address information provided by the target. The host adapter uses the offset to locate the pointer stored in the busy targets table and then locates the appropriate hardware request block using the pointer.

摘要翻译： 在内存中创建一个繁忙的目标表，该内存可以是SCSI主机适配器的内部或外部。 表中的每个条目最初设置为预定值。 在开始执行每个硬件请求块之前，主机适配器执行检查以确定是否可以通过使用硬件请求块中的目标地址向忙位目标表生成偏移量来此时执行硬件请求块。 然后，主机适配器在偏移位置处检查繁忙目标表中的条目。 如果偏移位置处的忙对象表中的条目是预定值，则目标地址即目标的设备可用。 因此，可以继续执行硬件请求块，因此主机适配器用指向所述SCSI硬件请求块的存储位置的指针来覆盖表中的偏移处的预定值，并且继续执行硬件请求块。 如果目标与主机适配器断开连接，则当目标重新连接到主机适配器时，忙位目标表用于定位相应的硬件请求块。 具体来说，主机适配器使用目标提供的目标地址信息来生成到忙目标表中的偏移量。 主机适配器使用偏移来定位存储在忙目标表中的指针，然后使用指针定位适当的硬件请求块。