公开(公告)号：US20220037455A1

公开(公告)日：2022-02-03

申请号：US17504403

申请日：2021-10-18

Applicant: Samsung Display Co., Ltd.

Inventor： Hyunae Park ,  Jaewon Kim ,  Hyungjun Park ,  Junyong An ,  Nuree Um ,  Ilgoo Youn ,  Jieun Lee ,  Donghyeon Jang ,  Seunghan Jo ,  Junyoung Jo

IPC: H01L27/32 ,  H01L51/00

Abstract: A display panel may include the following elements: a substrate including an opening area, a display area surrounding the opening area, and a first non-display area between the opening area and the display area; a data line positioned at a first side relative to the opening area; a first scan line; a second scan line; a first pixel connected to the data line and the first scan line; a second pixel connected to the data line and the second scan line; a first emission control line connected to the first pixel; a connecting section positioned on the first non-display area; a second emission control line connected to the second pixel and connected through the connecting section to the first emission control line; and an emission control driver configured to simultaneously provide emission control signals to the first emission control line and the second emission control line.

公开(公告)号：US20200176542A1

公开(公告)日：2020-06-04

申请号：US16697039

申请日：2019-11-26

Applicant: Samsung Display Co., Ltd.

Inventor： Hyunae Park ,  Jaewon Kim ,  Hyungjun Park ,  Junyong An ,  Nuree Um ,  Ilgoo Youn ,  Jieun Lee ,  Donghyeon Jang ,  Seunghan Jo ,  Junyoung Jo

IPC: H01L27/32 ,  H01L51/00

Abstract: A display panel may include the following elements: a substrate including an opening area, a display area surrounding the opening area, and a first non-display area between the opening area and the display area; a data line positioned at a first side relative to the opening area; a first scan line; a second scan line; a first pixel connected to the data line and the first scan line; a second pixel connected to the data line and the second scan line; a first emission control line connected to the first pixel; a connecting section positioned on the first non-display area; a second emission control line connected to the second pixel and connected through the connecting section to the first emission control line; and an emission control driver configured to simultaneously provide emission control signals to the first emission control line and the second emission control line.

公开(公告)号：US09991292B2

公开(公告)日：2018-06-05

申请号：US14227654

申请日：2014-03-27

Applicant: Samsung Display Co., Ltd.

Inventor： Jaewon Kim ,  Boyeong Kim ,  Soo-Hyun Kim ,  Kyung-ho Park ,  HyungJun Park ,  Dong-Hyun Yoo ,  Ki Yeup Lee ,  Seongyoung Lee

IPC: H01L27/12 ,  G09G3/3266 ,  G09G3/36

CPC classification number: H01L27/1255 ,  G09G3/3266 ,  G09G3/3677 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2330/04 ,  G09G2330/06

Abstract: A driver includes a dummy stage and one or more additional stages coupled to the dummy stage. The dummy stage includes a first transistor coupled between an input terminal and an output terminal. The first transistor includes two electrodes forming at least a first capacitor to store at least a portion of static electricity received through the input terminal. The one or more additional stages output gate signals, which may be received, for example, by a display device.

公开(公告)号：US09891491B2

公开(公告)日：2018-02-13

申请号：US14926505

申请日：2015-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jaewon Kim ,  Seonkyoon Mok ,  Kyunghoe Lee ,  Seongyoung Lee ,  Yoomi Ra

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1343

CPC classification number: G02F1/136286 ,  G02F1/134309 ,  G02F1/13624 ,  G02F2001/134345 ,  G02F2001/13606

Abstract: A liquid crystal display device has a liquid crystal layer between first and second substrates, a gate line and a data line on the first substrate, a first sub-pixel electrode in a first sub-pixel region of the first substrate, a first transistor connected to the gate line, the data line, and the first sub-pixel electrode, and a second sub-pixel electrode in a second sub-pixel region of the first substrate. The device further includes a second transistor connected to the gate line, the first transistor, and the second sub-pixel electrode, a first storage line extending along an edge portion of the first sub-pixel electrode, a third transistor connected to the gate line, the second sub-pixel electrode, and the first storage line, and a second storage line extending along a side of the second sub-pixel electrode, The second storage line is separated from the first storage line.