Abstract:
The invention relates to a decoding apparatus and same method for decoding a video bit stream. The apparatus decodes an encoded video bit stream to produce pixel data of a first and second macroblocks. The video bit stream comprises at least one video packet, a first, second, third logic units. The first logic unit comprising parameters a1 and b1. The second logic unit comprises parameters a2 and b2. The third logic unit comprises parameters a3 and b3. The parameters a1 and a2 are used for reconstructing a first macroblock. The parameters b1 and b2 are used for reconstructing a second macroblock. The video decoding apparatus comprises a searching module and a decoding module. The searching module locates a first address indicating location of the first logic unit, a second address indicating location of the second logic unit, and a third address indicating location of the third logic unit. The decoding module first decodes the first logic unit to obtain a decoded parameter A1 corresponding to the parameter a1 without obtaining and storing a decoded parameter B1 corresponding to the parameter b1 into a memory. The decoding module also decodes the second/third logic unit to obtain a decoded parameter A2/A3 corresponding to the parameter a2/a3. Then, the decoded parameters A1, A2, and A3 are used to produce the pixel data of the first macroblock.
Abstract:
A method and computer readable medium storing a corresponding computer program for decoding a video bitstream based on processors using dynamic load balancing are disclosed. In one embodiment of the present invention, the method configures multiple processors to perform the multiple processing modules including a prediction module by mapping the multiple processing modules to the multiple processors. One or more buffer queues are used among said multiple processing modules and the mapping the prediction module to the multiple processors is based on the level of the buffer queue. The multiple processors may correspond to a multi-core Central Processing Unit (CPU) comprising of multiple CPUs or a multi-core Digital Signal Processor (DSP) comprising of multiple DSPs to practice the present invention.
Abstract:
An interpolation unit receives an incoming video bit stream comprising a plurality of frames including first macroblocks encoded using block-matching motion compensation and second macroblocks encoded using global motion compensation. A translation unit converts global motion parameters included in a current frame of the incoming video bit stream into a global motion vector. The interpolation unit performs luminance and chrominance interpolation operations on each macroblock contained in each frame of the incoming video bit stream. When processing a current macroblock, if the current macroblock is encoded using global motion compensation, the interpolation unit performs the luminance interpolation operations according to the global motion vector at half-pel resolution, and performs the chrominance interpolation operations at quarter-pel resolution. If the current macroblock is encoded using block-matching motion compensation, the interpolation unit performs the luminance and chrominance interpolation operations according to the macroblock motion vector contained in the current macroblock at half-pel resolution.
Abstract:
A multi-purpose camera system includes an image capture block and an image signal processing block. The image capture block is arranged for generating an image signal, wherein the image capture block has an image sensor, an optical system, and a control circuit. The image signal processing block is arranged for processing the image signal. When the multi-purpose camera system is operated in a first operation mode, the multi-purpose camera system acts as a camera for generating a captured image output; when the multi-purpose camera system is operated in a second operation mode, the multi-purpose camera system acts as part of a user input apparatus for receiving a user input; and an overall configuration of the control circuit and the image signal processing block in the first operation mode is different from an overall configuration of the control circuit and the image signal processing block in the second operation mode.
Abstract:
The invention is related to a method, a device, and a machine readable medium for image capture and selection. One of the disclosed embodiments of the invention is specifically related to a method performed by an image capturing device The method includes capturing a sequence of images; storing a plurality of the captured images in a buffer, wherein each of the buffered images has an interested region supposed to encompass an interested target; detecting intactness information describing intactness of the interested target as encompassed in the interested regions of a plurality of the buffered images; and selecting at least one of the buffered images based on the detected intactness information.
Abstract:
An exemplary video processing apparatus includes a first detection unit, a second detection unit, a format conversion control unit, and a format conversion processing unit. The first detection unit detects a video format of a video input. The second detection unit detects a display capability of a display device. The format conversion control unit determines whether the video input has a three-dimensional (3D) video format or a two-dimensional (2D) video format by referring to the detected video format, determines whether the display device supports a 3D video format or a 2D video format by referring to the detected display capability, and accordingly generates a control signal. The format conversion processing unit is controlled by the control signal to generate a video output satisfying the detected display capability according to the video input when the video input does not satisfy the detected display capability.
Abstract:
A video encoding method includes: receiving a plurality of video data inputs corresponding to a plurality of video display formats, respectively, wherein the video display formats include a first three-dimensional (3D) anaglyph video; generating a combined video data by combining video contents derived from the video data inputs; and generating an encoded video data by encoding the combined video data. A video decoding method includes: receiving an encoded video data having encoded video contents of a plurality of video data inputs combined therein, wherein the video data inputs correspond to a plurality of video display formats, respectively, and the video display formats include a first three-dimensional (3D) anaglyph video; and generating a decoded video data by decoding the encoded video data.
Abstract:
A method for reducing complexity of a computer vision system and applying related computer vision applications includes: obtaining instruction information, wherein the instruction information is used for a computer vision application; obtaining image data from a camera module and defining at least one region of recognition corresponding to the image data by user gesture input on a touch-sensitive display; outputting a recognition result of the aforementioned at least one region of recognition; and searching at least one database according to the recognition result. Associated apparatus are also provided. For example, the apparatus includes an instruction information generator, a processing circuit, and a database management module, where the instruction information generator obtains the instruction information, and the processing circuit obtains the image data from the camera module, defines the aforementioned at least one region of recognition and outputs a recognition result of the at least one region of recognition.
Abstract:
A video player including a memory, a video decoder and a frame rate converter. The video decoder decodes a video bitstream to output decoded video to the memory and output first motion vector information encoded in the video bitstream. The frame rate converter, coupled to the video decoder, receives the first motion vector information and performs the frame rate conversion on the decoded video from the memory to generate a frame-rate converted video for display according to the first motion vector information.
Abstract:
To facilitate a low-power/power-aware, high-speed, and high-quality/quality-adaptive character rendering process, a character rendering system including a memory, a cache unit, a Bezier curve parallel decomposition module, a transfer controller, a parallel anti-aliasing module, a buffer, and a scan conversion unit is disclosed. The cache unit stores a plurality of Bezier curve key points corresponding to frequently used characters. The Bezier curve parallel decomposition module performs parallel decomposing processes on the Bezier curves of the Bezier curve key points corresponding to a character for generating a plurality of segments. The parallel anti-aliasing module performs parallel anti-aliasing processes on data of the segments transferred by the transfer controller for generating edge pixel data. The edge pixel data are transferred to the scan conversion unit via the memory or the buffer. The scan conversion unit performs a scan conversion process on the edge pixel data for generating image data of the character.