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公开(公告)号:US11616519B2
公开(公告)日:2023-03-28
申请号:US17015826
申请日:2020-09-09
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Koji Akita
Abstract: According to one embodiment, an electronic apparatus includes a receiver and a signal addition circuit. The receiver receives a reception signal of a first frequency band. The signal addition circuit is configured to input the reception signal and a calibration signal of a second frequency band which is different from the first frequency band to the receiver.
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公开(公告)号:US11452171B2
公开(公告)日:2022-09-20
申请号:US17014327
申请日:2020-09-08
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Daisuke Uchida , Koji Akita , Takafumi Sakamoto
Abstract: According to one embodiment, an electronic apparatus includes a transmitter and a processor. The transmitter transmits a signal to a first electronic apparatus with one of patterns including at least a first pattern which is a first order and which uses first to n-th frequency bands in first to n-th periods and a second pattern which is a second order different from the first order and which uses the first to n-th frequency bands in the first to n-th periods, where n is an integer greater than or equal to two. The processor switches a pattern to be used among the patterns in accordance with a communication situation.
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公开(公告)号:US11147025B2
公开(公告)日:2021-10-12
申请号:US16558547
申请日:2019-09-03
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Daiki Yoda , Koji Akita , Daisuke Uchida , Tamio Kawaguchi
Abstract: According to one embodiment, an electronic apparatus includes receiver circuitry, transmitter circuitry, and processor circuitry. The receiver circuitry receives a first signal including first data via a first frequency band. The transmitter circuitry starts transmission of a second signal via at least a part of the first frequency band. The processor circuitry reduces interference caused by the second signal to receive the first signal. The processor circuitry increases a power of the second signal until reducing the interference becomes stable for the first time since the transmitter circuitry has started transmission of the second signal.
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公开(公告)号:US09973211B1
公开(公告)日:2018-05-15
申请号:US15691467
申请日:2017-08-30
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Koji Akita , Yukako Tsutsumi
CPC classification number: H03M9/00 , H03L7/00 , H03L7/0807 , H03L7/087 , H04L7/033
Abstract: According to one embodiment, a signal conversion device includes a first serial-parallel converter, a second serial-parallel converter, a first buffer, a second buffer, a clock generator, and a selection output part. The first serial-parallel converter receives a first serial signal, generates a first clock signal I, generates a first parallel signal, and generates first status information including first information. The second serial-parallel converter receives a second serial signal, generates a second clock signal, generates a second parallel signal, and generates second status information including second information. The first buffer stores the first parallel signal. The second buffer stores the second parallel signal. The clock generator generates an output clock signal. The selection output part uses the first status information and the second status information to output a signal based on one parallel signal of the first parallel signal or the second parallel signal.
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公开(公告)号:US09613474B2
公开(公告)日:2017-04-04
申请号:US14017701
申请日:2013-09-04
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Tomoko Adachi , Seiichiro Horikawa , Koji Akita , Ryoko Matsuo
IPC: G07C9/00
CPC classification number: H04L63/08 , G07C9/00007 , G07C9/00103 , H04L5/0055 , H04W12/06 , H04W84/12
Abstract: According to one embodiment, when a control unit is notified of information in at least one second signal received by one of first and second wireless communication units after the control unit provides the second wireless communication unit with a command to transmit a first signal containing first address information and before a waiting time elapses and when the at least one second signal contains second address information assigned to an authentication apparatus having received the first signal, then the control unit provides the first wireless communication unit with a command to transmit a third signal for a connection request with the second address information set in a destination address.
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公开(公告)号:US09319883B2
公开(公告)日:2016-04-19
申请号:US14825380
申请日:2015-08-13
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Koji Akita , Seiichiro Horikawa , Hideo Kasami
Abstract: A card devices includes an authentication unit, a wireless communication unit, and a control unit. The authentication unit performs and authentication process with an external device via wired communication. The wireless communication unit performs wireless communication with the external device. The control unit controls the wireless communication unit to reduce radio waves radiated from the wireless communication unit when the control unit detects that the authentication process is being performed.
Abstract translation: 卡设备包括认证单元,无线通信单元和控制单元。 认证单元通过有线通信与外部设备进行认证处理。 无线通信单元与外部设备进行无线通信。 当控制单元检测到正在进行认证处理时,控制单元控制无线通信单元以减少从无线通信单元辐射的无线电波。
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47.
公开(公告)号:US20150063492A1
公开(公告)日:2015-03-05
申请号:US14537549
申请日:2014-11-10
Applicant: KABUSHIKI KAISHA TOSHIBA
Inventor: Ren SAKATA , Koji Akita
CPC classification number: H04B7/06 , H04B7/0413 , H04B7/0613 , H04B7/0671 , H04B7/0684 , H04L27/2602 , H04L27/2626
Abstract: A transmitter includes first generator to generate pilot source signal by modulating pilot sequence, second generator to generate data source signal with time length longer than that of pilot source signal by modulating data sequence, first cyclic shifter to perform cyclic shift of first shift amount to pilot source signal to generate first pilot signal, second cyclic shifter to performs cyclic shift of second shift amount to data source signal to generate first data signal, third cyclic shifter to perform cyclic shift of third shift amount to pilot source signal to generate second pilot signal, fourth cyclic shifter to perform cyclic shift of fourth shift amount to data source signal to generate second data signal, first transmit antenna to transmit first pilot signal and first data signal, and second transmit antenna to transmit second pilot signal and second data signal.
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