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41.发明申请公开(公告)号：US20180365011A1
公开(公告)日：2018-12-20
申请号：US16111873
申请日：2018-08-24
发明人： Michael K. Gschwind
摘要： A computer program product for implementing a received add program counter immediate shift (ADDPCIS) instruction using a micro-coded or cracked sequence is provided. The computer program product includes a computer readable storage medium having program instructions embodied therewith. The program instructions are readable and executable by a processing circuit to cause the processing circuit to recognize register operand and integer terms associated with the ADDPCIS instruction, set a value of a target register associated with the ADDPCIS instruction in accordance with the integer term summed with another term by obtaining a next instruction address (NIA), moving an architecturally defined register file from a first temporary register to a general purpose register and adding a shifted immediate constant to a value stored in a second temporary register.
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公开(公告)号：US10157119B2
公开(公告)日：2018-12-18
申请号：US15289513
申请日：2016-10-10
摘要： A method, computer program product, and system performing a method that include a processor defining a code fingerprint by obtaining parameters describing at least one of an event type or an event. The code fingerprint includes a first sequence. The processor loads the code fingerprint into a register accessible to the processor. Concurrent with executing a program, the processor obtains the code fingerprint from the register and identifies the code fingerprint in the program by comparing a second sequence in the program to the first sequence. Based on identifying the code fingerprint in the program, the processor alerts a runtime environment where the program is executing.
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公开(公告)号：US10152324B2
公开(公告)日：2018-12-11
申请号：US14477899
申请日：2014-09-05
发明人： Michael K. Gschwind , Brett Olsson
摘要： Embodiments of methods and computer program products disclosed herein relate to processor architecture. One such method includes the processor obtaining an instruction. The instruction specifies an operation, and also specifies one of the registers as a source register and one of the registers as a destination register. The method also includes the processor obtaining an endian mode and determining that the instruction is an element-ordering-sensitive instruction. Based on the determination that the instruction is an element-ordering-sensitive instruction, the processor executes the instruction by performing the operation on the elements of the source register in accordance with the endian mode and writing a result of the operation to the destination register.
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44.发明授权公开(公告)号：US10120745B2
公开(公告)日：2018-11-06
申请号：US14989459
申请日：2016-01-06
摘要： Corruption of program stacks is detected by using guard words placed in the program stacks. An instruction, which is to be used in protecting stacks of a computing environment, is provided in a called routine, based on determining that the called routine is to include logic to detect corruption of stacks. The instruction in the called routine is to check a guard word provided by a calling routine to determine whether a stack is corrupt.
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公开(公告)号：US20180314637A1
公开(公告)日：2018-11-01
申请号：US16026207
申请日：2018-07-03
IPC分类号： G06F12/0804 , G06F12/0831 , G06F12/0817 , G06F12/0815
CPC分类号： G06F12/0828 , G06F12/0804 , G06F12/0815 , G06F12/0831 , G06F2212/621
摘要： Facilitating processing in a computing environment. A request to access a cache of the computing environment is obtained from a transaction executing on a processor of the computing environment. Based on obtaining the request, a determination is made as to whether a tracking set to be used to track cache accesses is to be updated. The tracking set includes a read set to track read accesses of at least a selected portion of the cache and a write set to track write accesses of at least the selected portion of the cache. The tracking set is assigned to the transaction, and another transaction to access the cache has another tracking set assigned thereto. The tracking set assigned to the transaction is updated based on the determining indicating the tracking set is to be updated.
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公开(公告)号：US20180300159A1
公开(公告)日：2018-10-18
申请号：US15812587
申请日：2017-11-14
摘要： Register restoration using transactional memory register snapshots. An indication that a transaction is to be initiated is obtained. Based on obtaining the indication, a determination is made as to whether register restoration is in active use. Based on obtaining the indication and determining register restoration is in active use, register restoration is deactivated. To recover one or more architected registers of the transaction, a transactional rollback snapshot is created.
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公开(公告)号：US20180300158A1
公开(公告)日：2018-10-18
申请号：US15810618
申请日：2017-11-13
发明人： Michael K. Gschwind
摘要： Management of a store queue based on a restoration operation. A determination is made as to whether a restoration operation to perform a bulk restore of a set of architected registers has completed. Based on determining that the restoration operation has completed, one or more store queue entries corresponding to the restoration operation are invalidated.
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公开(公告)号：US20180300155A1
公开(公告)日：2018-10-18
申请号：US15489989
申请日：2017-04-18
发明人： Michael K. Gschwind
摘要： Management of a store queue based on a restoration operation. A determination is made as to whether a restoration operation to perform a bulk restore of a set of architected registers has completed. Based on determining that the restoration operation has completed, one or more store queue entries corresponding to the restoration operation are invalidated.
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公开(公告)号：US20180300153A1
公开(公告)日：2018-10-18
申请号：US15489923
申请日：2017-04-18
摘要： Snapshots are shared across save requests. A request to take a snapshot of one or more architected registers is obtained, and a determination is made as to whether the one or more architected registers have been modified since a previous snapshot that includes the one or more architected registers was taken. Based on determining the one or more architected registers have not been modified, the previous snapshot is used to satisfy the request to take the snapshot.
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公开(公告)号：US20180253304A1
公开(公告)日：2018-09-06
申请号：US15449183
申请日：2017-03-03
发明人： Michael K. Gschwind
IPC分类号： G06F9/30
摘要： Dynamically selecting a version of an instruction to be executed. Based on processing, a version of an instruction to be executed is selected. The selecting chooses the version from a plurality of versions of instructions. The plurality of versions of instructions including an architected version and another version different from the architected version. The version of the instruction selected for execution is executed.
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