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公开(公告)号：US20210134203A1
公开(公告)日：2021-05-06
申请号：US16839858
申请日：2020-04-03
Inventor： Ying WANG , Meng LI , Jing LI , Hongmin LI
IPC: G09G3/20
Abstract: A shift register, a method for driving the same, a gate driving circuit and a display device are provided. The shift register includes an input sub-circuit, an output sub-circuit, a reset sub-circuit, and a first shift output sub-circuit to an m-th shift output sub-circuit. The i-th shift output sub-circuit is connected with a third node, an (i−1)-th shift node, an i-th shift node, an (i+1)-th clock signal terminal, a first power terminal, a second power terminal, an (i−1)-th shift signal output terminal and an i-th shift signal output terminal, and is configured to supply a signal of the first power terminal to the i-th shift signal output terminal and a signal of the second power terminal to the (i−1)-th shift signal output terminal and the (i−1)-th shift node under control of the (i+1)-th clock signal terminal, i being an integer between 2 and m.
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公开(公告)号：US20210118347A1
公开(公告)日：2021-04-22
申请号：US16840152
申请日：2020-04-03
Inventor： Ying WANG , Meng LI , Aifeng GAO , Hongmin LI
Abstract: A shift register, a method for driving the same, a gate driving circuit and a display device are provided. The shift register includes an input sub-circuit, a pull-down control sub-circuit, an output sub-circuit and a reset sub-circuit. The pull-down control sub-circuit is connected to a first signal input terminal, a pull-up node, a pull-down node and a first power terminal, and is configured to supply a first voltage signal of the first power terminal to the pull-down node under the control of the first input signal and a potential of the pull-up node. The output sub-circuit is connected to the first node and a second clock signal terminal, and is configured to output a second clock signal of the second clock signal terminal to a first output terminal and a second output terminal under the control of the potential of the pull-up node.
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公开(公告)号：US20200090571A1
公开(公告)日：2020-03-19
申请号：US16443325
申请日：2019-06-17
Inventor： Meng LI , Yongqian LI , Zhidong YUAN , Can YUAN
IPC: G09G3/20
Abstract: The present disclosure provides a gate driving circuit and a driving method thereof as well as a display device. The gate driving circuit comprises a driving circuit connected to a gate line for outputting a gate scanning signal; and a detecting circuit connected to the gate line for collecting and recording the gate scanning signal.
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公开(公告)号：US20190156778A1
公开(公告)日：2019-05-23
申请号：US15772677
申请日：2017-09-15
Inventor： Meng LI , Yongqian LI , Pan XU , Miao ZHANG
Abstract: The present application provides a shift register circuit, a gate driving circuit including the shift register circuit, and a driving method applied to the shift register circuit. The shift register circuit includes an input sub-circuit, an output sub-circuit, an output reset sub-circuit, and a first capacitor, wherein the first capacitor is connected between the pull-up node and the second clock signal terminal, and configured to maintain a high level at the pull-up node through the second clock signal input at the second clock signal terminal. The shift register circuit further includes a second capacitor connected between the pull-down node and a first voltage input terminal, and configured to pull down a level at the pull-down node through a reverse bias voltage input at the first voltage input terminal during a blanking time after a frame of scanning ends.
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公开(公告)号：US20250166571A1
公开(公告)日：2025-05-22
申请号：US19030733
申请日：2025-01-17
Inventor： Tianyi CHENG , Meng LI , Zhongliu YANG
IPC: G09G3/3258
Abstract: A pixel circuit, a driving method and a display device. The pixel circuit includes a light emitting element, a driving circuit, an energy storage circuit, an initialization circuit, and a compensation control circuit; the display period of the pixel circuit includes a refresh frame and a retention frame; the refresh frame and the retention frame respectively include a set phase and a light emitting phase set successively; the initialization circuit is configured to control provide the initial voltage to the first terminal and/or the second terminal of the driving circuit under the control of the initial control signal provided by the initial control terminal, in the refresh frame and the retention frame, at least in the set phase. The present disclose improves hysteresis and improves the display effect.
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Patent Agency Ranking
公开(公告)号：US20250143111A1
公开(公告)日：2025-05-01
申请号：US18692341
申请日：2023-08-10
Inventor： Zhengkun LI , Meng LI , Benlian WANG , Xiaohuan CHANG
IPC: H10K59/131 , H10H29/34 , H10H29/49 , H10K59/35
Abstract: A display substrate includes a base substrate, multiple light emitting elements, and multiple pixel circuits. The multiple light emitting elements include multiple groups of light emitting elements. At least one of the multiple groups of light emitting elements includes multiple first region light emitting elements located in a first display region and multiple second region light emitting elements located in a second display region. The multiple pixel circuits include multiple groups of pixel circuits. At least one of the multiple groups of pixel circuits includes multiple first type pixel circuits and multiple second type pixel circuits. The multiple first region light emitting elements at least include multiple first light emitting elements emitting light in a first color and multiple second light emitting elements emitting light in a second color. The multiple first type pixel circuits include multiple first pixel circuits and multiple second pixel circuits.
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公开(公告)号：US20240373691A1
公开(公告)日：2024-11-07
申请号：US18289368
申请日：2022-02-28
IPC: H10K59/131 , G09G3/3233 , H10K59/121
Abstract: A display panel is provided. The display panel includes a light emitting unit and a pixel driving circuit. The pixel driving circuit includes a driving transistor, a fifth transistor and a sixth transistor, the fifth transistor includes a first electrode connected to a power line, a second electrode connected to a first electrode of the driving transistor and a gate electrode connected to a first enabling signal line, and the sixth transistor includes a first electrode connected to a second electrode of the driving transistor, a second electrode connected to a first electrode of the light emitting unit and a gate electrode connected to a second enabling signal line.
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公开(公告)号：US20240324352A1
公开(公告)日：2024-09-26
申请号：US18575185
申请日：2022-09-21
Inventor： Meng LI , Yao HUANG , Tianyi CHENG , Lili DU , Hongjun ZHOU , Zhenhua ZHANG
IPC: H10K59/131 , H10K59/122 , H10K59/35
CPC classification number: H10K59/131 , H10K59/122 , H10K59/353
Abstract: Provided are a display panel and a display apparatus. The display panel includes a base substrate, a fifth conductive layer, an electrode layer and a pixel defining layer. The electrode layer includes a plurality of electrode portions, at least one of the electrode portions comprises a body portion and a supplemental portion which are connected with each other, and an orthographic projection of the supplemental portion on the base substrate at least partially overlaps with an orthographic projection of a corresponding power line on the base substrate.
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公开(公告)号：US20240221584A1
公开(公告)日：2024-07-04
申请号：US17778376
申请日：2021-06-02
Inventor： Meng LI , Tianyi CHENG , Yao HUANG
IPC: G09G3/20
CPC classification number: G09G3/2092 , G09G2300/0426 , G09G2300/0852 , G09G2310/0267 , G09G2310/0275 , G09G2310/061
Abstract: A driving circuit includes an output circuit, a first node reset circuit and a second node control capacitor; the output circuit controls a driving signal terminal to output a driving signal under the control of a potential of a first node; the first node reset circuit controls to reset the first node under the control of a potential of a second node; the second node control capacitor is electrically connected to the second node; a width-to-length ratio of an output transistor included in the output circuit is less than or equal to a first predetermined width-to-length ratio; and/or a width-to-length ratio of a first node reset transistor included in the first node reset circuit is greater than or equal to a second predetermined width-to-length ratio; and/or, a capacitance value of the second node control capacitor is greater than or equal to a predetermined capacitance value.
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公开(公告)号：US20240029647A1
公开(公告)日：2024-01-25
申请号：US18477479
申请日：2023-09-28
Inventor： Yudiao CHENG , Benlian WANG , Meng LI , Weiyun HUANG , Yao HUANG
IPC: G09G3/3225 , G09G3/3275 , H10K50/86 , H10K59/65 , H10K59/121 , H10K59/131 , H10K71/00 , G09G3/3233
CPC classification number: G09G3/3225 , G09G3/3275 , H10K50/865 , H10K59/65 , H10K59/121 , H10K59/131 , H10K59/1213 , H10K59/1216 , H10K71/00 , G09G3/3233 , G09G2300/0413 , G09G2300/0426 , G09G2300/0842 , G09G2310/0272 , H10K59/1201
Abstract: The present disclosure provides display substrate and display device, and belongs to the field of display technology. The display substrate of the disclosure has mounting region, first display region adjacent to mounting region, and second display region surrounding first display region and/or mounting region. The display substrate comprises: substrate; driving circuit layer on substrate and comprising pixel driving circuits in first display region and second display region, and arrangement density of pixel driving circuits in second display region is less than that of pixel driving circuits in second display region; and light emitting devices in mounting region, first display region, and second display region, first electrode of each light emitting device being electrically coupled to a corresponding pixel driving circuit, and pixel driving circuit electrically coupled to first electrode of light emitting device in the mounting region being located in first display region.
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