Abstract:
A liquid crystal display includes: a liquid crystal display panel including data lines and gate lines crossing each other; a timing controller that maps data of an input image to polarity patterns of 1-dot inversion and 2-dot inversion, counts the number of positive data and the number of negative data, determines whether any one of the positive data and negative data becomes dominant or not based on a difference between the counted numbers, and selects either one of the 1-dot and 2-dot inversions; a data driving circuit that converts the data of the input image into data voltages to be supplied to the data lines and inverts the polarity of the data voltages by the selected dot inversion; and a gate driving circuit that sequentially supplies gate pulses synchronized with the data voltages to the gate lines.
Abstract:
A liquid crystal display device and a driving method thereof are provided which can increase a display grade by removing a DC residual image. The liquid crystal display device comprises: a liquid crystal display panel for displaying gray levels by a potential difference between a common electrode for applying a common voltage and pixel electrodes for applying data voltages; a common voltage regulating circuit for generating a variable common voltage which is longitudinally symmetrical with respect to a DC common voltage of a predetermined level and whose voltage level is stepwisely varied at predetermined intervals; and a black gamma reference voltage regulating circuit for adding the variable common voltage to an offset voltage set as a gamma reference voltage of a black gray level to generate a variable gamma reference voltage varying with respect to the gamma reference voltage of the black gray level, the variable gamma reference voltage of the black gray level being varied in synchronization with the variable common voltage.
Abstract:
A liquid crystal display and a method of driving the same are disclosed. The liquid crystal display includes a liquid crystal display panel including data lines and gate lines crossing each other and liquid crystal cells, a timing control signal generating unit, a data drive circuit supplying a data voltage to the data lines, and a gate drive circuit. The timing control signal generating unit generates a first gate timing control signal for controlling a scan direction of the liquid crystal display panel in a sequential direction and a second gate timing control signal for controlling the scan direction in a reverse sequential direction. The gate drive circuit supplies a gate pulse to the gate lines while a shift direction of the gate pulse changes in response to the first and second gate timing control signals.
Abstract:
A liquid crystal display and driving method thereof are disclosed. The liquid crystal display according to an embodiment of the invention includes a liquid crystal panel having liquid crystal cells in a matrix array at crossings of data lines and gate lines; a timing controller for receiving a digital video data and synchronous signals, and generating a source output enable signal, a first gate start pulse, a second gate start pulse having a pulse width different from that of the first gate start pulse, a gate shift clock, a first gate output enable signal and a second gate output enable signal; a data driving circuit for providing a data voltage to the data lines in response to a first logic value of the source output enable signal, and any one black gray voltage of a charge share voltage and a precharge voltage to the data lines in response to a second logic value of the source output enable signal; and a gate driving circuit for providing a first gate pulse in synchronization with the data voltage and a second gate pulse in synchronization with the black gray voltage to the gate lines, in response to the first gate start pulse, the second gate start pulse, the gate shift clock, the first gate output enable signal and the second gate output enable signal.
Abstract:
A liquid crystal display includes a liquid crystal display panel including a plurality of data lines, a plurality of gate lines crossing the plurality of data lines, and a plurality of liquid crystal cells, a timing controller to determine gray levels of input digital video data and a time when a polarity of a data voltage to be supplied to the data lines is inverted, and to generate a dynamic charge share control signal when the gray level of the data voltage is changed from a white gray level to a black gray level and the polarity of the data voltage is inverted, a data driving circuit to convert the digital video data from the timing controller into the data voltage, changing the polarity of the data voltage, and supplying any one of a common voltage and a charge share voltage to the data lines in response to the dynamic charge share control signal, and a gate driving circuit to sequentially supply scan pulses to the gate lines under the control of the timing controller.