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公开(公告)号：US20170280556A1
公开(公告)日：2017-09-28
申请号：US15219935
申请日：2016-07-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: H05K1/02
CPC classification number: H05K1/0237 , H05K1/025 , H05K1/0268
Abstract: The present invention provides a wiring structure of high frequency signal wires and a PCB board including the wiring structure of high frequency signal wires. A test part is formed by extending a high frequency signal wire from a connection end connected with a solder pad, and a test window corresponding to a position of the test part is provided on a copper foil which covers the solder pad and the test part, to expose the high frequency signal wire, such that a high frequency signal transmitted via the high frequency signal wire can be directly tested at the test window. Thus, circular test points used in the prior art can be removed, to effectively solve the problem of insufficient space on a PCB; accordingly, lengths of the high frequency signal wires become more precise, so as to ensure a synchronization of transmission of the high frequency signal wires.
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公开(公告)号：US20250095563A1
公开(公告)日：2025-03-20
申请号：US18577122
申请日：2022-08-18
Inventor： Wenchao BAO , Zhidong YUAN , Xiaolong WEI , Min HE , Huihui LI
IPC: G09G3/3208 , G09G3/20
Abstract: A display method, including: performing a full-screen display refresh on a display panel at a first refresh rate; meanwhile, setting a refresh factor to n, where n is a positive integer; refreshing the local area of the display panel at the second refresh rate; increasing the refresh factor by m, where m is a positive integer; determining whether the refresh factor is greater than or equal to a set value; if yes, performing the full-screen display refresh on the display panel at the first refresh rate; setting the refresh factor to n; and if no, continuing refreshing the same local area of the display panel at the second refresh rate; increasing the refresh factor by m, where the second refresh rate is greater than the first refresh rate, and the second refresh rate is an integer multiple of the first refresh rate.
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公开(公告)号：US20250031505A1
公开(公告)日：2025-01-23
申请号：US18688018
申请日：2022-09-21
Inventor： Wenjie XU , Xiaodong XIE , Min HE , Jing WANG , Huayu SANG , Xue ZHAO , Xinxiu ZHANG , Feifei YU
IPC: H01L33/62 , H01L25/075
Abstract: A light-emitting diode driving backplane and a display apparatus are provided, and belong to the field of display technology. The light-emitting diode driving backplane includes: a base substrate divided into luminescent lamp regions and a first wiring region around the luminescent lamp regions; at least one pair of first connection pads, signal traces and an auxiliary functional component on the base substrate. The at least one pair of first connection pads and the auxiliary functional component are in the luminescent lamp regions, the signal traces are in the first wiring region, each pair of first connection pads includes a positive pad and a negative pad, and the signal traces are electrically connected to the corresponding positive negative pads for providing driving signals thereto, and the auxiliary functional component and at least some signal traces are in the same layer.
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公开(公告)号：US20240047481A1
公开(公告)日：2024-02-08
申请号：US17639316
申请日：2021-04-16
Inventor： Xinxiu ZHANG , Huayu SANG , Xue ZHAO , Xiaodong XIE , Tengfei ZHONG , Wenjie XU , Min HE , Bin PANG , Qiang JI , Jin ZHANG
IPC: H01L27/12 , H01L33/62 , H01L25/16 , H01L25/075
CPC classification number: H01L27/1244 , H01L33/62 , H01L25/167 , H01L25/0753 , H01L2933/0066
Abstract: An array substrate includes: a substrate, a first conductive layer, a second conductive layer and at least two organic insulating layers; the first conductive layer is provided on a side of the substrate; the second conductive layer is provided on a side of the first conductive layer away from the substrate, and an orthographic projection of the second conductive layer on the substrate has an overlapped region with an orthographic projection of the first conductive layer on the substrate, the overlapped region includes a via region and a routing region; the at least two organic insulating layers are provided between the first conductive layer and the second conductive layer, and an orthographic projection of the at least two organic insulating layers on the substrate is overlapped with an orthographic projection of the routing region.
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公开(公告)号：US20230376159A1
公开(公告)日：2023-11-23
申请号：US17907000
申请日：2021-10-20
Inventor： Xinxiu ZHANG , Min HE , Xiaodong XIE , Tianyu ZHANG , Xue ZHAO , Tengfei ZHONG , Huayu SANG , Bin PANG
IPC: G06F3/047
CPC classification number: G06F3/047 , G06F2203/04103 , G06F2203/04107
Abstract: Provided are a touch substrate and a method for manufacturing the same, and a display apparatus. The touch substrate includes: a base, a first touch layer and a second touch layer on the base, and an interlayer insulation layer between the second touch layer and the first touch layer. The first touch layer includes first touch electrodes and touch signal lines arranged side by side along a first direction and extending in a second direction. The second touch layer includes second touch electrodes arranged side by side along the second direction, each of which extends in the first direction and is connected to at least one touch signal line through a first connection via penetrating through the interlayer insulation layer. The first touch layer further includes at least one shielding electrode extending in the second direction and arranged between the first touch electrodes and the touch signal lines.
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Patent Agency Ranking
公开(公告)号：US20230061318A1
公开(公告)日：2023-03-02
申请号：US17793975
申请日：2022-05-17
Inventor： Xiaodong XIE , Min HE , Jing WANG , Tianyu ZHANG , Xue ZHAO , Tengfei ZHONG
IPC: H01L33/62 , H01L33/00 , H01L25/075
Abstract: A light emitting substrate and a manufacturing method thereof, and a display device are provided. The manufacturing method includes providing a base substrate; forming a first conductive pattern on the base substrate using a first mask; forming a first insulating layer on the first conductive pattern using a second mask, to form a first via hole and a second via hole; forming a second conductive pattern on the first insulating layer using the first mask, the second conductive pattern being electrically connected to the first conductive pattern through the first via hole and the second via hole; forming a second insulating layer on the second conductive pattern using the second mask, to form a third via hole; and forming a third conductive pattern on the second insulating layer using a third mask, the third conductive pattern being electrically connected to the second conductive pattern through the third via hole.
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公开(公告)号：US20220342245A1
公开(公告)日：2022-10-27
申请号：US17432557
申请日：2020-10-28
Inventor： Min HE , Jing WANG , Xiaodong XIE , Tianyu ZHANG , Xue ZHAO , Tengfei ZHONG , Xinxiu ZHANG , Huayu SANG , Feng QU
IPC: G02F1/1345
Abstract: The embodiment of the present disclosure provides a driving backplate including a base substrate, and an insulation layer and a plurality of conductive structures on the base substrate. The insulation layer insulates the plurality of conductive structures from each other. The plurality of conductive structures includes a first conductive layer and a second conductive layer sequentially stacked along a direction away from the base substrate. At least one portion of a region in which the first conductive layer is in contact with the second conductive layer includes a flat contact region. An opening is formed at a position in the insulation layer corresponding to the conductive structure. An edge of the opening in the insulation layer is between the first conductive layer and the second conductive layer and is correspondingly in edge regions of the first conductive layer and the second conductive layer.
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公开(公告)号：US20220197434A1
公开(公告)日：2022-06-23
申请号：US17359508
申请日：2021-06-26
Abstract: Provided are a touch substrate, a preparation method thereof and a touch device. The touch substrate includes a substrate, and a first conductive layer, a first insulating layer and a second conductive layer sequentially stacked on the substrate. The first conductive layer includes a first capacitive touch electrode, a first wiring and a second wiring. The first wiring is electrically connected to the first capacitive touch electrode, and the second wiring is insulated from the first capacitive touch electrode. The first insulating layer includes at least one first via. The second conductive layer includes a second capacitive touch electrode, which is electrically connected to the second wiring through the first via. The second conductive layer further includes an additional functional channel, which is insulated from the second capacitive touch electrode.
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公开(公告)号：US20210335245A1
公开(公告)日：2021-10-28
申请号：US17259702
申请日：2020-06-24
IPC: G09G3/3233 , G09G3/3275 , G09G3/32
Abstract: A method for controlling a charging time of a display panel includes: during t0+kΔt in a (k+1)-th blanking time, writing a data voltage to a gate of a driving transistor, and detecting a voltage Vk_(j,i) of a second electrode of the driving transistor; during a t0+(k+r)Δt in a (k+1+r)-th blanking time, writing the data voltage to the gate of the driving transistor, and detecting a voltage Vk+i_(j,i) of the second electrode of the driving transistor; determining whether ΔVj,i=Vk+1_ji−Vk_ji is less than or equal to a target voltage difference VT; if ΔVj,i≤VT, taking the T=t0+kΔt as an expected charging time of a sub-pixel; if ΔVj,i>VT, cyclically performing the charging step described above to obtain ΔVj,i=Vk+p+1_(j,i)−Vk+p_(j,i), and comparing ΔVj,i with the target voltage difference VT, until ΔVj,i≤VT, taking t0+(k+p+r−1)Δt as the expected charging time of the sub-pixel. p is taken from 1, and increases by 1 for each cycle.
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公开(公告)号：US20210064209A1
公开(公告)日：2021-03-04
申请号：US16833613
申请日：2020-03-29
Inventor： Xinxiu ZHANG , Shifeng XU , Xiaodong XIE , Min HE , Tengfei ZHONG , Bin PANG , Yuan LI , Tianyu ZHANG , Xue ZHAO
Abstract: The present disclosure provides a touch screen and a display device. The touch screen includes a substrate, and a first metal wiring layer, a second metal wiring layer, and a third metal wiring layer formed on the substrate. A first insulation layer is arranged on a surface of the first metal wiring layer, and the second metal wiring layer is arranged on the first insulation layer. A second insulation layer is arranged on a surface of the second metal wiring layer, and the third metal wiring layer is arranged on the second insulation layer. Electrical connection channels are electrically connected to the second electrode channels in a one-to-one corresponding manner by using through holes, and the electrical connection channels are electrically connected to a second electrode lead terminal, so that the second electrode channels are electrically connected to the second electrode lead terminal.
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