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公开(公告)号:US20200233831A1
公开(公告)日:2020-07-23
申请号:US16844995
申请日:2020-04-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG
IPC: G06F13/42 , G06F15/16 , G06F13/40 , G06F15/173 , H04L12/861
Abstract: A device that may configure itself is disclosed. The device may include an interface that may be used for communications with a chassis. The interface may support a plurality of transport protocols. The device may include a Vital Product Data (VPD) reading logic to read a VPD from the chassis and a built-in self-configuration logic to configure the interface to use one of the transport protocols and to disable alternative transport protocols, responsive to the VPD.
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公开(公告)号:US20190354287A1
公开(公告)日:2019-11-21
申请号:US16056515
申请日:2018-08-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: David SCHWADERER , Sompong Paul OLARIG , Jason MARTINEAU
IPC: G06F3/06
Abstract: A Key-Value SSD (KV-SSD) is disclosed. The KV-SSD may include a data structure including a plurality of image values used by the application program. The data structure may include a plurality of first dimension containers to organize the data according to a first dimension. Each of the plurality of first dimension containers may include at least one value storing image data for the image object at a resolution and a Chroma Subsampling rate.
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33.
公开(公告)号:US20190310957A1
公开(公告)日:2019-10-10
申请号:US16260087
申请日:2019-01-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , Fred WORLEY , Oscar P. PINTO
Abstract: A topology is disclosed. The topology may include at least one Non-Volatile Memory Express (NVMe) Solid State Drive (SSD), a Field Programmable Gate Array (FPGA) to implement one or more functions supporting the NVMe SSD, such as data acceleration, data deduplication, data integrity, data encryption, and data compression, and a Peripheral Component Interconnect Express (PCIe) switch. The PCIe switch may communicate with both the FPGA and the NVMe SSD.
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34.
公开(公告)号:US20180285019A1
公开(公告)日:2018-10-04
申请号:US15489416
申请日:2017-04-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , Son T. PHAM , Ramdas KACHARE
IPC: G06F3/06
CPC classification number: G06F3/067 , G06F3/0604 , G06F3/0635 , H04L41/0806 , H04L49/356 , H04L49/357 , H04L67/1097
Abstract: Disclosed herein is a computer storage array providing one or more remote initiators with NVMe over Fabrics (NVMe-oF) access to one or more storage devices connected to the storage array. According to an example embodiment, the computer storage array comprises: a computer processor configured to run an operating system for managing networking protocols; a network switch configured to establish an NVMe-oF connection and route data between the initiators and the storage devices; a baseboard management controller (BMC) configured to configure a network setting or NVMe-oF setting of the storage devices; a PCIe switch connecting the BMC with each of the storage devices via a PCIe bus; and a computer motherboard including the PCIe bus and to which the computer processor, network switch, BMC and PCIe switch are installed.
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35.
公开(公告)号:US20180267836A1
公开(公告)日:2018-09-20
申请号:US15603437
申请日:2017-05-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , David SCHWADERER
IPC: G06F9/50
CPC classification number: G06F9/5027 , G06F2209/509
Abstract: According to one general aspect, a system may include a non-volatile memory (NVM), a resource arbitration circuit, and a shared resource. The non-volatile memory may be configured to store data and manage the execution of a task. The non-volatile memory may include a network interface configured to receive data and the task, a NVM processor configured to determine if the processor will execute that task or if the task will be assigned to a shared resource within the system, and a local communication interface configured to communicate with at least one other device within the system. The resource arbitration circuit may be configured to receive a request to assign the task to the shared resource, and manage the execution of the task by the shared resource. The shared resource may be configured to execute the task.
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公开(公告)号:US20180074984A1
公开(公告)日:2018-03-15
申请号:US15345509
申请日:2016-11-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , Son T. PHAM
IPC: G06F13/36
Abstract: A Baseboard Management Controller (BMC) (125) that may configure itself is disclosed. The BMC (125) may include an access logic (415) to determine a configuration of a chassis (105) that includes the BMC (125). The BMC (125) may also include a built-in self-configuration logic (420) to configure the BMC (125) responsive to the configuration of the chassis (105). The BMC (125) may self-configure without using any BIOS, device drivers, or operating systems.
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37.
公开(公告)号:US20180074717A1
公开(公告)日:2018-03-15
申请号:US15345507
申请日:2016-11-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , Son T. PHAM
IPC: G06F3/06 , G06F15/177
CPC classification number: G06F3/0607 , G06F3/061 , G06F3/0632 , G06F3/0655 , G06F3/0679 , G06F3/0689 , G06F11/30 , G06F15/177 , G06F2206/1014
Abstract: A proxy device (125) that may query other devices (320, 325, 330) for their configurations is disclosed. The proxy device (125) may include a device communication logic (430) to communicate with the devices (320, 325, 330) over a control plane. The proxy device (125) may also include reception logic 440 that may receive a query (1105) from a host (110). The query (1105) may request information from the proxy device (125) about the configurations of the devices (320, 325, 330). The proxy device (125) may also include a transmission logic (445) to send the device configurations to the host (110).
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公开(公告)号:US20250103533A1
公开(公告)日:2025-03-27
申请号:US18973890
申请日:2024-12-09
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , Fred WORLEY
Abstract: A rack-mountable data storage system includes: a chassis including one or more switchboards; a midplane interfacing with the one or more switchboards; and one or more data storage devices removably coupled to the midplane using a connector. At least one data storage device of the one or more data storage devices include a logic device to interface with the midplane. The logic device provides a device-specific interface of a corresponding data storage device with the midplane. The at least one data storage device is configured using the logic device according to a first protocol based on a signal on a pin of the connector, and the at least one data storage device is reconfigurable according to a second protocol based on a change of the signal on the pin of the connector using the logic device.
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39.
公开(公告)号:US20230289073A1
公开(公告)日:2023-09-14
申请号:US18200567
申请日:2023-05-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sompong Paul OLARIG , Yasser ZAGHLOUL
IPC: G06F3/06
CPC classification number: G06F3/0625 , G06F3/0659 , G06F3/0679
Abstract: A storage device may include a connector comprising a power management pin, a detector circuit configured to detect a transition of a power management signal received on the power management pin, and a power management circuit capable of configuring power to at least a portion of the storage device based, at least in part, on the detector circuit detecting a transition of the power management signal. The connector may further include a port enable pin, and the power management circuit may be configured to be disabled based, at least in part, on a state of the port enable pin. A storage device may include a connector comprising a power management pin, a nonvolatile memory, and a power management circuit configured to operate in a first power management mode based on determining a first state of the nonvolatile memory.
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40.
公开(公告)号:US20230266900A1
公开(公告)日:2023-08-24
申请号:US18139260
申请日:2023-04-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sompong Paul OLARIG
CPC classification number: G06F3/0634 , G06F3/0607 , G06F13/4282 , G06F3/0679 , G06F13/4063
Abstract: A memory device is configured to communicate with one or more external devices, the memory device including a configurable bit or a mode select pin for determining which one of two or more different communication protocols that the memory device uses to communicate with the one or more external devices, wherein the two or more different communications protocols include at least a Controller Area Network (CAN) protocol and a System Management Bus (SMBus) protocol.
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