Display device
    31.
    发明授权

    公开(公告)号:US10234982B2

    公开(公告)日:2019-03-19

    申请号:US15192939

    申请日:2016-06-24

    Abstract: A display device includes a display panel and a touch sensing unit including touch signal lines (TSL) and sensor columns (SCs) including sensor blocks (SBs). Each SB includes a first sensor (FS) and i (i being ≥2) second sensors (SSs). The TSLs include: first signal lines (FSLs) respectively connected to some of the FSs, a portion of each of the FSLs extending to a first end of a corresponding SC from a corresponding sensor of the some of the FSs; second signal lines (SSLs) respectively connected to other FSs, a portion of each of the SSLs extending to a second end of the corresponding SC from a corresponding sensor of the other FSs; and third signal lines connecting a j-th (j being ≤1) SS of an n-th (n being ≥1) SB to an (i−j+1)-th SS of an (n+1)-th SB.

    Display panel
    33.
    发明授权
    Display panel 有权
    显示面板

    公开(公告)号:US09553203B2

    公开(公告)日:2017-01-24

    申请号:US14506061

    申请日:2014-10-03

    CPC classification number: H01L29/7869 H01L29/45 H01L29/66969

    Abstract: A display panel includes a base substrate including a pixel area and a peripheral area, a semiconductor layer disposed on a portion of the base substrate, a display element disposed in the pixel area, and a thin film transistor which controls the display element and includes an input electrode, an output electrode and a control electrode, in which the semiconductor layer includes a first portion disposed on the input electrode of the first thin film transistor, a second portion disposed on the output electrode of the first thin film transistor, and a third portion which connects the first portion and the second portion, overlaps the control electrode of the first thin film transistor, and defines a channel of the first thin film transistor.

    Abstract translation: 显示面板包括:基板,包括像素区域和外围区域;设置在基板的一部分上的半导体层;设置在像素区域中的显示元件;以及控制显示元件的薄膜晶体管, 输入电极,输出电极和控制电极,其中半导体层包括设置在第一薄膜晶体管的输入电极上的第一部分,设置在第一薄膜晶体管的输出电极上的第二部分,以及第三部分 连接第一部分和第二部分的部分与第一薄膜晶体管的控制电极重叠,并限定第一薄膜晶体管的沟道。

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