公开(公告)号：US20210375192A1

公开(公告)日：2021-12-02

申请号：US17191588

申请日：2021-03-03

Applicant: Samsung Display Co., Ltd.

Inventor： JAE-HYEON JEON ,  YU-CHOL KIM ,  JIHYE KIM ,  JIN-WOOK YANG ,  DONGGYU LEE ,  JAKYOUNG JIN

IPC: G09G3/32

Abstract: A display device includes a display panel including a pixel, a voltage line supplying a power voltage to the pixel, and a reference voltage line supplying one of a reference voltage and the power voltage to the pixel; a mode selector configured to output one of a first selection signal and a second selection signal according to an operation mode of the display panel; and a switch configured to provide the reference voltage or the power voltage to the reference voltage line in response to one of the first selection signal and the second selection signal.

公开(公告)号：US20250140206A1

公开(公告)日：2025-05-01

申请号：US18915563

申请日：2024-10-15

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SEHYUK PARK ,  YOUNGHA SOHN ,  JIN-WOOK YANG ,  DONGGYU LEE ,  JAE-HYEON JEON

IPC: G09G3/3266 ,  G09G3/32

Abstract: A gate driver including: first to N-th stages receiving first to N-th clock signals from first to N-th clock lines, the first stage includes a first clock terminal receiving the first clock signal, a second clock terminal receiving a second clock signal, a carry terminal receiving a vertical start signal, and an output terminal outputting a first gate signal, an N−K-th stage includes a first clock terminal receiving an N−K-th clock signal, a second clock terminal receiving an N−K+1-th clock signal, a carry terminal receiving an N−K−1-th gate signal, and an output terminal outputting an N−K-th gate signal, and the N-th stage includes a first clock terminal receiving the N-th clock signal, a second clock terminal receiving the first clock signal, a carry terminal receiving an N−1-th gate signal, and an output terminal outputting an N-th gate signal.

公开(公告)号：US20240257720A1

公开(公告)日：2024-08-01

申请号：US18493977

申请日：2023-10-25

Applicant: Samsung Display Co., LTD.

Inventor： Seongoh YEOM ,  YU-CHOL KIM ,  JIHYE KIM ,  JIN-WOOK YANG ,  EUI-MYEONG CHO ,  JAKYOUNG JIN

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0247 ,  G09G2360/16

Abstract: A luminance compensation method of a display device includes a first luminance for a reference grayscale at a first operating frequency and a second luminance for the reference grayscale at a second operating frequency are measured. A first reference value is calculated based on the first luminance and the second luminance, a first duty ratio of the initialization control signal is changed into a second duty ratio depending on a comparison result of the first reference value and a threshold value After the first duty ratio is changed into the second duty ratio, a third luminance for the reference grayscale is measured, and a second reference value is calculated based on the first luminance and the third luminance. A final duty ratio corresponding to the threshold value is calculated depending on a comparison result of the second reference value and the threshold value.

公开(公告)号：US20240153434A1

公开(公告)日：2024-05-09

申请号：US18239124

申请日：2023-08-29

Applicant: Samsung Display Co., Ltd.

Inventor： JIHYE KIM ,  YU-CHOL KIM ,  JIN-WOOK YANG ,  Seongoh YEOM ,  EUI-MYEONG CHO ,  JAKYOUNG JIN

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/0267 ,  G09G2320/0233

Abstract: Disclosed is a display device including a display panel including a pixel, a scan driver, and a driving controller that controls driving of the scan driver. The scan driver provides the pixel with a first mode scan signal having a first active period and a second active period in a first mode and provides the pixel with a second mode scan signal having a compensation active period in a second mode. The driving controller determines whether an operating frequency of the display device corresponds to one of predetermined compensation frequencies in a variable frequency mode, and operates the scan driver in the first mode or the second mode depending on a determination result of the determining.

公开(公告)号：US20240144881A1

公开(公告)日：2024-05-02

申请号：US18347168

申请日：2023-07-05

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SEHYUK PARK ,  YOUNGHA SOHN ,  JIN-WOOK YANG ,  DONGGYU LEE ,  JAE-HYEON JEON

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/0247

Abstract: A display apparatus includes a display panel, a gate driver, a data driver and an emission driver. The display panel includes a pixel. The gate driver is configured to output a gate signal to the pixel. The data driver is configured to output a data voltage to the pixel. The emission driver is configured to output an emission signal to the pixel. The pixel includes a light emitting element, a driving switching element configured to apply a driving current to the light emitting element and a bias switching element configured to apply a bias voltage to the driving switching element. The display apparatus increases a level of the bias voltage when a duration of a light emission time of the pixel is increased.

公开(公告)号：US20240112622A1

公开(公告)日：2024-04-04

申请号：US18224452

申请日：2023-07-20

Applicant: Samsung Display Co., LTD.

Inventor： JIN-WOOK YANG ,  YU-CHOL KIM ,  DONGGYU LEE ,  JAE-HYEON JEON

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0216 ,  G09G2310/0267 ,  G09G2330/028

Abstract: A pixel includes: a light-emitting element including an anode and a cathode, a first transistor including a first and a second electrode and a gate electrode connected with a first node, a third transistor connected between the second electrode of the first transistor and the first node and including a gate electrode connected with a first scan line, a sixth transistor connected between the second electrode of the first transistor and the anode and including a gate electrode connected with a first emission line, and a seventh transistor connected between the anode and an initialization voltage line and including a gate electrode connected with a second scan line. During an initialization period, the third, sixth, and seventh transistors are turned on such that an initialization voltage from the initialization voltage line is transferred to the gate electrode of the first transistor.

公开(公告)号：US20240062704A1

公开(公告)日：2024-02-22

申请号：US18136430

申请日：2023-04-19

Applicant: Samsung Display Co., LTD.

Inventor： JAEKEUN LIM ,  JIN-WOOK YANG ,  BON-SEOG GU ,  JINYOUNG ROH ,  HAE-KWAN SEO

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0297 ,  G09G2300/0452 ,  G09G2310/0272 ,  G09G2320/0233 ,  G09G2330/021

Abstract: A display panel of a display device includes: first light emitting elements located in a first row, second light emitting elements located in a second row adjacent to the first row, first pixel circuits located in the first row, and second pixel circuits located in the second row. Each of the first pixel circuits drives a first light emitting element, located in a column the same as a column in which the each of the first pixel circuits is located, among the first light emitting elements. At least one second pixel circuit of the second pixel circuits drives a second light emitting element, located in a column different from a column in which the at least one second pixel circuit is located, among the second light emitting elements.

公开(公告)号：US20240013709A1

公开(公告)日：2024-01-11

申请号：US18106704

申请日：2023-02-07

Applicant: Samsung Display Co., Ltd.

Inventor： DONGGYU LEE ,  SEHYUK PARK ,  YOUNGHA SOHN ,  JIN-WOOK YANG ,  JAE-HYEON JEON

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/08 ,  G09G2310/061 ,  G09G2310/0267 ,  G09G2320/0233

Abstract: A display device includes a display panel which includes first to nth pixel areas arranged in a direction, where n is a natural number greater than or equal to 2, an emission control driver which provides an emission control signal having a plurality of emission cycles corresponding to a number of outputs of a gate-on voltage during a frame period to the first to nth pixel areas, a power supply which generates first to nth bias voltages respectively provided to the first to nth pixel areas, and a timing controller which controls timings when the first to nth bias voltages are supplied to the first to nth pixel areas in a way such that a kth bias voltage is provided with a delay of one emission cycle from a (k−1)th bias voltage, where k is a natural number greater than or equal 2 and less than or equal n.

公开(公告)号：US20240005868A1

公开(公告)日：2024-01-04

申请号：US18368946

申请日：2023-09-15

Applicant: Samsung Display Co., Ltd.

Inventor： SOON-DONG KIM ,  TAEHOON KIM ,  JIN-WOOK YANG ,  EUN SIL YUN ,  CHANGNOH YOON

IPC: G09G3/3258

CPC classification number: G09G3/3258 ,  G09G2310/0278 ,  G09G2330/021

Abstract: Disclosed is a display device including a display panel including a plurality of pixels and a voltage generator providing an anode initialization voltage to the pixels. The display panel is divided into a first display area operating at a first operating frequency and a second display area operating at a second operating frequency. While pixels, which correspond to the first display area, from among the plurality of pixels are driven, the anode initialization voltage has a first voltage level. While pixels in the second display area from among the plurality of pixels are driven, the anode initialization voltage has a second voltage level different from the first voltage level.

公开(公告)号：US20240005851A1

公开(公告)日：2024-01-04

申请号：US18368909

申请日：2023-09-15

Applicant: Samsung Display Co., Ltd.

Inventor： SOON-DONG KIM ,  SANGAN KWON ,  TAEHOON KIM ,  JIN-WOOK YANG

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2310/0267 ,  G09G2330/021

Abstract: A display device includes: a display panel including a plurality of pixels connected to a plurality of scan lines; a scan driving circuit, which drives the plurality of scan lines in synchronization with a clock signal; and a driving controller, which outputs the clock signal. While an operating mode is a multi-frequency mode, the driving controller comparts the display panel into a first display area and a second display area. A hold frame of the multi-frequency mode includes a first section during which the first display area is driven, and a second section during which the second display area is driven. The driving controller outputs the clock signal of a normal power mode during the first section and outputs the clock signal of a low-power mode during the second section.