公开(公告)号：US11244240B2

公开(公告)日：2022-02-08

申请号：US16301863

申请日：2016-05-17

Applicant: Google LLC

Inventor： John Martinis ,  Nan Ding ,  Ryan Babbush ,  Sergei V. Isakov ,  Hartmut Neven ,  Vadim Smelyanskiy ,  Sergio Boixo Castrillo

IPC: G06N10/00

Abstract: Methods and apparatus for estimating the fidelity of quantum hardware. In one aspect, a method includes accessing a set of quantum gates; sampling a subset of quantum gates from the set of quantum gates, wherein the subset of quantum gates defines a quantum circuit; applying the quantum circuit to a quantum system and performing measurements on the quantum system to determine output information of the quantum system; calculating output information of the quantum system based on application of the quantum circuit to the quantum system; and estimating a fidelity of the quantum circuit based on the determined output information and the calculated output information of the quantum system.

公开(公告)号：US20210192114A1

公开(公告)日：2021-06-24

申请号：US16754998

申请日：2017-12-18

Applicant: Google LLC

Inventor： Sergio Boixo Castrillo ,  Vadim Smelyanskiy

IPC: G06F30/3308 ,  G06N10/00

Abstract: Methods, systems and apparatus for simulating quantum circuits including multiple quantum logic gates. In one aspect, a method includes the actions of representing the multiple quantum logic gates as functions of one or more classical Boolean variables that define a undirected graphical model with each classical Boolean variable representing a vertex in the model and each function of respective classical Boolean variables representing a clique between vertices corresponding to the respective classical Boolean variables; representing the probability of obtaining a particular output bit string from the quantum circuit as a first sum of products of the functions; and calculating the probability of obtaining the particular output bit string from the quantum circuit by directly evaluating the sum of products of the functions. The calculated partition function is used to (i) calibrate, (ii) validate, or (iii) benchmark quantum computing hardware implementing a quantum circuit.