ELECTRONIC SUBSTRATE AND ELECTRONIC DEVICE
    31.
    发明公开

    公开(公告)号:US20240023407A1

    公开(公告)日:2024-01-18

    申请号:US18256843

    申请日:2021-11-24

    CPC classification number: H10K59/82 H10K59/40

    Abstract: An electronic substrate and an electronic device are provided. The electronic substrate includes a base substrate, and a first signal line and a second signal line on the base substrate; the electronic substrate includes a first functional region and a peripheral region, and the first signal line and the second signal line are in the peripheral region; at least one of the first signal line and the second signal line is configured to transmit an electrical signal for the first functional region; in a direction perpendicular to the base substrate, the first signal line partially overlaps with the second signal line in an overlapping region; and the first signal line includes a first wiring portion in the overlapping region and a second wiring portion outside the overlapping region, and a line width of the first wiring portion is different from a line width of the second wiring portion.

    PIXEL ARRAY AND DISPLAY DEVICE
    34.
    发明申请

    公开(公告)号:US20220352259A1

    公开(公告)日:2022-11-03

    申请号:US17434877

    申请日:2020-10-30

    Abstract: The present disclosure provides a pixel array and a display device. The pixel array includes first sub-pixels, second sub-pixels and third sub-pixels; the first sub-pixels and the third sub-pixels are alternately arranged along a first direction to form first pixel groups, and are alternately arranged along a second direction to form third pixel groups; the second sub-pixels are arranged along the first direction to form second pixel groups, and are arranged along the second direction to form fourth pixel groups; wherein the first pixel groups and the second pixel groups are alternately arranged in the second direction; the third pixel groups and the fourth pixel groups are alternately arranged along the first direction; wherein a shape of the second sub-pixel includes a polygon, a plurality of sides of the polygon include straight lines or arcs, and the shape of the second sub-pixel includes at most one symmetry axis.

    PIXEL ARRAY AND DISPLAY DEVICE
    35.
    发明申请

    公开(公告)号:US20220328573A1

    公开(公告)日:2022-10-13

    申请号:US17850172

    申请日:2022-06-27

    Abstract: There is provided a pixel array including a plurality of sub-pixels, which include first sub-pixels, second sub-pixels, and third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form a plurality of first pixel rows, the first and third sub-pixels, which are in a same column, in the plurality of first pixel rows are alternately arranged, and the second sub-pixels are arranged along the row direction and form second pixel rows. Lines sequentially connecting centers of any two of the first sub-pixels and any two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. At least one interior angle of the first virtual quadrilateral is not 90°. At least one of the first, second and third sub-pixels has a corner circularly or rectilinearly chamfered.

    Display Substrate and Display Apparatus

    公开(公告)号:US20220310752A1

    公开(公告)日:2022-09-29

    申请号:US17418865

    申请日:2020-08-27

    Abstract: Provided is a display substrate, including a base substrate, multiple sub-pixels, multiple data lines, a first wiring layer, a second wiring layer and a first insulator layer. The base substrate includes a display region and a bending region located on a side of the display region. The multiple sub-pixels are located in the display region, the multiple data lines are located in the display region and electrically connected to the multiple sub-pixels, and the multiple data lines are configured to provide data signals to the multiple sub-pixels. The first wiring layer is partially disposed in the bending region of the base substrate and is connected to the multiple data lines. The second wiring layer is located in the bending region and disposed on a side of the first wiring layer away from the base substrate, and is connected to the first wiring layer.

    PIXEL ARRAY AND DISPLAY DEVICE
    37.
    发明申请

    公开(公告)号:US20220310710A1

    公开(公告)日:2022-09-29

    申请号:US17439861

    申请日:2020-09-29

    Abstract: There is provided a pixel array including a plurality of sub-pixels, which include first sub-pixels, second sub-pixels, and third sub-pixels. The first and third sub-pixels are alternately arranged along a row direction and form a plurality of first pixel rows, the first and third sub-pixels, which are in a same column, in the plurality of first pixel rows are alternately arranged, and the second sub-pixels are arranged along the row direction and form second pixel rows. Lines sequentially connecting centers of any two of the first sub-pixels and any two of the third sub-pixels, which are arranged in an array, together form a first virtual quadrilateral, and one of the second sub-pixels is in each first virtual quadrilateral. At least one interior angle of the first virtual quadrilateral is not 90°. At least one of the first, second and third sub-pixels has a corner circularly or rectilinearly chamfered.

    MASK ASSEMBLY AND MANUFACTURING METHOD THEREOF

    公开(公告)号:US20220307121A1

    公开(公告)日:2022-09-29

    申请号:US17309828

    申请日:2020-12-29

    Abstract: Embodiments of the present disclosure provide a mask assembly and a manufacturing method thereof. The mask assembly includes: a frame; a mask provided with a mask area and connection areas positioned on opposite sides of the mask area; and a plurality of first connection parts in each connection area, wherein the plurality of first connection parts in each connection area are arranged in M rows and N columns, each row includes a plurality of first connection parts, each column includes at least one first connection part, and in the same connection area, the first connection parts of any two adjacent rows are arranged in a staggered manner, where each of M and N is an integer larger than 1, and the mask is fixed to the frame via the plurality of first connection parts.

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