公开(公告)号：US3909748A

公开(公告)日：1975-09-30

申请号：US47471774

申请日：1974-05-30

Applicant: RCA CORP

Inventor： YUAN SHUI ,  CAMISA RAYMOND LOUIS

IPC: H03B1/00 ,  H03B5/12 ,  H03J5/02 ,  H03B3/04

CPC classification number: H03J5/0245 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/124 ,  H03B2200/0056 ,  H03B2201/0283 ,  H03J2200/10

Abstract: The tuned circuit of an oscillator includes n metal-insulatorsemiconductor (MIS) diodes. The oscillator frequency may be switched, in discrete steps, to any one of 2n different values in response to n control voltages, representing an n bit binary word, applied to the respective diodes.

Abstract translation: 振荡器的调谐电路包括n个金属 - 绝缘体半导体（MIS）二极管。 响应于表示施加到相应二极管的n位二进制字的n个控制电压，振荡器频率可以以离散步长切换到2n个不同值中的任何一个。

公开(公告)号：US3518571A

公开(公告)日：1970-06-30

申请号：US3518571D

申请日：1968-07-08

Applicant: BELL TELEPHONE LABOR INC

Inventor： FELDMAN DAVID ,  RAO TADIKONDA N

IPC: H03B1/00 ,  H03B5/24 ,  H03B5/26 ,  H04M1/50

CPC classification number: H03B5/26 ,  H03B5/24 ,  H03B2201/0283 ,  H04M1/50

公开(公告)号：US3495187A

公开(公告)日：1970-02-10

申请号：US3495187D

申请日：1968-04-10

Applicant: INT STANDARD ELECTRIC CORP

Inventor： JEZIERSKI EUGENIUSZ CZESLAW JA ,  MCLELLAN JOHN

IPC: H03B1/00 ,  H03B5/36 ,  H03B5/30

CPC classification number: H03B5/36 ,  H03B2200/0026 ,  H03B2200/0048 ,  H03B2200/0056 ,  H03B2200/007 ,  H03B2201/02 ,  H03B2201/0258 ,  H03B2201/0283

公开(公告)号：US20130107978A1

公开(公告)日：2013-05-02

申请号：US13281871

申请日：2011-10-26

Applicant: Edwin Thaller ,  Roberto Nonis

Inventor： Edwin Thaller ,  Roberto Nonis

IPC: H04L27/00 ,  H03L7/099 ,  H03B5/12

CPC classification number: H03B5/124 ,  H03B5/1212 ,  H03B5/1228 ,  H03B5/1265 ,  H03B2201/0208 ,  H03B2201/0283 ,  H03J2200/10

Abstract: One embodiment of the present invention relates to a digital controlled oscillator. The oscillator includes an oscillator circuit, a varactor array, and a control circuit. The oscillator circuit receives a control word and a signal and generates an oscillator clock signal from the signal at a frequency selected by the control word. The varactor array has a first array of varactor cells having incremental capacitance values and a second array of varactor cells having equal capacitance values. The split varactor array provides a capacitance value. A control circuit is coupled to the oscillator circuit and controls the split varactor array according to the control word. The control circuit sets varactor cells of the split varactor array on or off.

Abstract translation: 本发明的一个实施例涉及数字控制振荡器。 振荡器包括振荡电路，变容二极管阵列和控制电路。 振荡器电路接收控制字和信号，并从控制字选择的频率的信号产生振荡器时钟信号。 变容二极管阵列具有具有增量电容值的变容二极管单元的第一阵列和具有相等电容值的变容二极管单元的第二阵列。 拆分变容二极管阵列提供电容值。 控制电路耦合到振荡器电路，并根据控制字控制分离变容二极管阵列。 控制电路设置分离变容二极管阵列的变容二极管电池。

公开(公告)号：US07411462B2

公开(公告)日：2008-08-12

申请号：US11551124

申请日：2006-10-19

Applicant: John Wallberg ,  Robert B. Staszewski ,  Vanessa M. Bodrero

Inventor： John Wallberg ,  Robert B. Staszewski ,  Vanessa M. Bodrero

IPC: G01R23/00 ,  H03B5/32 ,  H03M1/00

CPC classification number: G01R31/31727 ,  H03B2201/0283 ,  H03J2200/10

Abstract: A novel testing mechanism operative to test large capacitor arrays such as those used in a digitally controlled crystal oscillator (DCXO). The invention is adapted for use in DCXO circuits that employ dynamic element matching in their array decoding circuits. The invention combines the use of DEM during regular operation of the DCXO with a testing technique that greatly reduces the number of tests required. The invention tests the capacitors in the array on a row by row, wherein all the capacitors in a row are tested lumped together and treated as a single entity, which results in significantly reduced testing time. This permits the measurement of significantly higher frequency deviations due to the larger capacitances associated with an entire row of capacitors being tested.

Abstract translation: 一种新颖的测试机制，用于测试诸如数字控制晶体振荡器（DCXO）中使用的大电容阵列。 本发明适用于在其阵列解码电路中采用动态元件匹配的DCXO电路中。 本发明结合了DCXO正常运行期间DEM的使用与大大减少所需测试次数的测试技术。 本发明逐行测试阵列中的电容器，其中一行中的所有电容器被集中测试并被处理为单个实体，这导致测试时间显着减少。 这允许由于与被测试的整个电容器相关联的较大电容而测量显着更高的频率偏差。

公开(公告)号：US07084713B2

公开(公告)日：2006-08-01

申请号：US11043385

申请日：2005-01-25

Applicant: Vincenzo F. Peluso

Inventor： Vincenzo F. Peluso

IPC: H03B1/00 ,  H03B5/00 ,  H03B5/12

CPC classification number: H03B5/1228 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1287 ,  H03B5/1293 ,  H03B2201/0266 ,  H03B2201/0283 ,  H03J1/005 ,  H03J2200/10

Abstract: A programmable capacitor bank includes multiple tuning elements. Each tuning element includes two tuning capacitors and a pass transistor that electrically connects or disconnects the capacitors to/from common nodes. For a thermometer decoded capacitor bank, the tuning capacitors for all tuning elements have equal capacitance. Each tuning element further includes at least one pull-up transistor that provides high bias voltage for the pass transistor and at least one pull-down transistor that provides low bias voltage for the pass transistor. The multiple tuning elements may be arranged in a ladder topology such that (1) the tuning elements are turned on in sequential order starting from one end of the ladder and going toward the other end of the ladder and (2) each tuning element receives biasing from a preceding tuning element and provides biasing to a succeeding tuning element. The capacitor bank may be used for VCOs and other circuits.

Abstract translation: 可编程电容器组包括多个调谐元件。 每个调谐元件包括两个调谐电容器和将电容器与公共节点电连接或断开的通过晶体管。 对于温度计解码电容器组，用于所有调谐元件的调谐电容器具有相等的电容。 每个调谐元件还包括提供用于传输晶体管的高偏置电压的至少一个上拉晶体管和为传输晶体管提供低偏置电压的至少一个下拉晶体管。 多个调谐元件可以被布置成梯形拓扑结构，使得（1）调谐元件从梯子的一端开始并且朝着梯子的另一端顺序地接通，并且（2）每个调谐元件接收偏置 并且向后续的调谐元件提供偏置。 电容器组可用于VCO和其他电路。

公开(公告)号：US20050212614A1

公开(公告)日：2005-09-29

申请号：US11043385

申请日：2005-01-25

Applicant: Vincenzo Peluso

Inventor： Vincenzo Peluso

IPC: H03B1/00 ,  H03B5/12 ,  H03B5/00

CPC classification number: H03B5/1228 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1265 ,  H03B5/1287 ,  H03B5/1293 ,  H03B2201/0266 ,  H03B2201/0283 ,  H03J1/005 ,  H03J2200/10

Abstract: A programmable capacitor bank includes multiple tuning elements. Each tuning element includes two tuning capacitors and a pass transistor that electrically connects or disconnects the capacitors to/from common nodes. For a thermometer decoded capacitor bank, the tuning capacitors for all tuning elements have equal capacitance. Each tuning element further includes at least one pull-up transistor that provides high bias voltage for the pass transistor and at least one pull-down transistor that provides low bias voltage for the pass transistor. The multiple tuning elements may be arranged in a ladder topology such that (1) the tuning elements are turned on in sequential order starting from one end of the ladder and going toward the other end of the ladder and (2) each tuning element receives biasing from a preceding tuning element and provides biasing to a succeeding tuning element. The capacitor bank may be used for VCOs and other circuits.

Abstract translation: 可编程电容器组包括多个调谐元件。 每个调谐元件包括两个调谐电容器和将电容器与公共节点电连接或断开的通过晶体管。 对于温度计解码电容器组，用于所有调谐元件的调谐电容器具有相等的电容。 每个调谐元件还包括提供用于传输晶体管的高偏置电压的至少一个上拉晶体管和为传输晶体管提供低偏置电压的至少一个下拉晶体管。 多个调谐元件可以被布置成梯形拓扑结构，使得（1）调谐元件从梯子的一端开始并且朝着梯子的另一端顺序地接通，并且（2）每个调谐元件接收偏置 并且向后续的调谐元件提供偏置。 电容器组可用于VCO和其他电路。

公开(公告)号：US06323736B2

公开(公告)日：2001-11-27

申请号：US09824277

申请日：2001-04-02

Applicant: Lars Gustaf Jansson

Inventor： Lars Gustaf Jansson

IPC: H03B512

CPC classification number: H03F3/45085 ,  H01L27/0805 ,  H03B5/1215 ,  H03B5/1231 ,  H03B5/124 ,  H03B5/1265 ,  H03B2201/0266 ,  H03B2201/0283 ,  H03F1/56 ,  H03F2203/45631 ,  H03F2203/45638 ,  H03J2200/10 ,  H03L7/099 ,  H03L7/10 ,  H03L7/18

Abstract: A method and apparatus for digitally controlling the capacitance of an integrated circuit device using MOS-FET devices. In accordance with one aspect of the present invention, a one-bit or “binary” varactor is presented wherein the gate-to-bulk capacitance of the MOS-FET device exhibits dependency to a D.C. voltage applied between its gate and well implant regions. The capacitance-voltage characteristic of the binary capacitor has three major regions: (1) a first relatively flat region having little or no voltage dependency and having a capacitance equal to a first low capacitance of C1; (2) a sloped region wherein a voltage dependency exists; and (3) a second relatively flat region where there is little or no voltage dependency and where the capacitance equals a second higher capacitance of C2. The capacitance of the binary capacitor can be changed from C1 to C2 simply by changing the polarity of the applied D.C. voltage from a positive to a negative value. A plurality of binary capacitors are configured in a parallel arrangement to produce a digitally controlled capacitor. The digitally controlled capacitor can be used in any integrated circuit requiring a tightly controlled tuned network. One application is a voltage-controlled oscillator (VCO) wherein the center output frequency of the VCO is calibrated by digitally modifying the capacitance of the VCO's digitally controlled capacitor. A means for determining whether the VCO requires calibration and a means for calibrating the center output frequency of the VCO is presented.

Abstract translation: 一种使用MOS-FET器件数字控制集成电路器件的电容的方法和装置。 根据本发明的一个方面，提出了一种一位或“二进制”变容二极管，其中MOS-FET器件的栅极 - 体积电容表现出对其栅极和阱注入区域之间施加的直流电压的依赖性。 二元电容器的电容电压特性具有三个主要区域：（1）具有很小或没有电压依赖性并具有等于C1的第一低电容的电容的第一相对平坦的区域; （2）存在电压依赖性的倾斜区域; 和（3）几乎没有或没有电压依赖性并且电容等于C2的第二较高电容的第二相对平坦的区域。 通过将所施加的直流电压的极性从正值改变为负值，可以将二进制电容器的电容从C1改变为C2。 多个二进制电容器被配置成并联布置以产生数字控制的电容器。 数字控制电容器可用于需要严格控制的调谐网络的任何集成电路中。 一种应用是压控振荡器（VCO），其中VCO的中心输出频率通过数字修改VCO的数字控制电容器的电容来校准。 提出了一种用于确定VCO是否需要校准的装置，以及用于校准VCO的中心输出频率的装置。

公开(公告)号：US4827226A

公开(公告)日：1989-05-02

申请号：US200329

申请日：1988-05-31

Applicant: Lawrence E. Connell

Inventor： Lawrence E. Connell

IPC: H03B1/00 ,  H03B5/36

CPC classification number: H03B5/368 ,  H03B2200/0008 ,  H03B2200/0012 ,  H03B2200/004 ,  H03B2200/005 ,  H03B2201/0208 ,  H03B2201/0283 ,  H03J2200/10

Abstract: A fully integrated, adjustable oscillator circuit for use with a crystal is disclosed in which a crystal oscillator, such as a Pierce oscillator, is arranged to utilize a tuning network that includes at least one integrated varactor (voltage-variable-capacitor) as a shunt element for providing at least one type of adjustment of the oscillating signal. More than one type of adjustment can be provided by including a bank of varactors for each of the shunt elements of the tuning network, in which various individual varactors are selected in binary (on-off) fashion to effect digital as well as analog adjustment of the crystal oscillator.

Abstract translation: 公开了一种与晶体一起使用的完全集成的可调谐振荡器电路，其中诸如皮尔斯振荡器的晶体振荡器被布置成利用包括至少一个积分变容二极管（电压可变电容器）作为分流器的调谐网络 元件，用于提供振荡信号的至少一种调整类型。 可以通过为调谐网络的每个分流元件包括一组变容二极管来提供多种类型的调节，其中以二进制（开 - 关）方式选择各种变容二极管以实现数字以及模拟调整 晶体振荡器。

公开(公告)号：US4000379A

公开(公告)日：1976-12-28

申请号：US517376

申请日：1974-10-23

Applicant: Michael C. J. Cowpland

Inventor： Michael C. J. Cowpland

IPC: H03B1/00 ,  H03B5/20 ,  H04M1/50 ,  H04Q9/12

CPC classification number: H04M1/50 ,  H03B5/20 ,  H03B2201/0283 ,  H03B2201/031

Abstract: A modified Sallen and key active filter useful for generating tones in a tone generator which can be connected to a telephone line. The modification allows a broad range of frequencies to be generated with a relatively constant output amplitude, the output signal of which can be usefully employed for D.T.M.F. or interoffice multifrequency signal generation.

Abstract translation: 用于在可以连接到电话线的音调发生器中产生音调的经修改的Sallen和键有源滤波器。 该修改允许以相对恒定的输出幅度产生宽范围的频率，其输出信号可以有效地用于D.T.M.F. 或局间多频信号发生。