公开(公告)号：US06844785B2

公开(公告)日：2005-01-18

申请号：US10459577

申请日：2003-06-12

申请人： Ming-Cheng Chiang ,  Jui-Cheng Huang

发明人： Ming-Cheng Chiang ,  Jui-Cheng Huang

IPC分类号： H03L7/099 ,  H03L7/18 ,  H03L7/06

CPC分类号： H03L7/18 ,  H03L7/0996

摘要： A phase-lock loop for preventing frequency drift and jitter problems is disclosed. A phase comparator compares an input signal and a feedback signal, and outputs a control voltage according to phase difference therebetween. A voltage-controlled oscillator outputs a plurality of multiple phase oscillating signals according to the control voltage. A phase swallower receives a plurality of multiple phase oscillating signals, and generates a phase swallow signal. The phase swallow signal is formed by adding or removing one phase in the oscillating signal per predetermined number of clocks. An output frequency divider divides the frequency of the phase swallow signal so as to generate a desired output signal.

摘要翻译： 公开了一种用于防止频率漂移和抖动问题的锁相环。 相位比较器比较输入信号和反馈信号，并根据它们之间的相位差输出控制电压。 压控振荡器根据控制电压输出多个多相振荡信号。 相位吞吐器接收多个多相振荡信号，并产生相位信号。 相位吞咽信号是通过在每个预定数量的时钟周期中在振荡信号中相加或去除一相而形成的。 输出分频器分频相位信号的频率，以产生期望的输出信号。