公开(公告)号：US20210050391A1

公开(公告)日：2021-02-18

申请号：US16991486

申请日：2020-08-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sewan SON ,  Jinsung AN ,  Minwoo WOO ,  Wangwoo LEE ,  Jiseon LEE ,  Haejin KIM ,  Seongjun LEE

IPC: H01L27/32 ,  H01L51/00 ,  H01L51/52

Abstract: A display apparatus includes: a base substrate including a display area, an opening area, and an opening peripheral area between the opening area and the display area, wherein the display area surrounds the opening area, and the opening peripheral area has an annular shape; a conductive pattern disposed on the base substrate in the opening peripheral area and having an annular shape; and a light emitting layer disposed on the base substrate and in a portion of the opening peripheral area, and including an organic material, and wherein the light emitting layer is not formed at a portion of opening peripheral area that is adjacent to the opening area.

公开(公告)号：US20190341439A1

公开(公告)日：2019-11-07

申请号：US16377255

申请日：2019-04-08

Applicant: Samsung Display Co., Ltd.

Inventor： Yoonsun CHOI ,  Seong Ryong LEE ,  Hyun Chul KIM ,  Seongjun LEE ,  Eunae JUNG

IPC: H01L27/32 ,  H01L51/52 ,  G09G3/3291

Abstract: An organic light-emitting display device includes a base substrate, a pixel array, a first power voltage wiring and a second power voltage wiring. The base substrate includes a pixel area and a peripheral area that surrounds the pixel area. The pixel array is disposed in the pixel area. The first power voltage wiring is disposed in the peripheral area and includes a first lower power voltage line and a first upper power voltage line. The first upper power voltage line is disposed on the first lower power voltage line and contacts the first lower power voltage line. The second power voltage wiring is disposed in the peripheral area and includes a second lower power voltage line and a second upper power voltage line. The second upper power voltage line is disposed on the second lower power voltage line and contacts the second lower power voltage line. The first upper power voltage line overlaps the second lower power voltage line in a plan view.