公开(公告)号：US10437113B2

公开(公告)日：2019-10-08

申请号：US14996326

申请日：2016-01-15

Applicant: Samsung Display Co., Ltd.

Inventor： Tae Hee Lee ,  Hyoung Joon Kim ,  Hyo Jin Kim ,  Kap Soo Yoon ,  Jeong Uk Heo ,  Ji Yun Hong

IPC: G02F1/1343 ,  G02F1/1339 ,  G02F1/1335 ,  G02F1/1341 ,  G02F1/01 ,  G02F1/1333

Abstract: A liquid crystal display includes a first substrate including: a display area including a plurality of pixels on the first substrate, a non-display area which is disposed on an outside of the display area and in which a dummy wire is disposed on the first substrate, and an image input hole which is defined therein in the non-display area and in which an image input device is disposed, a second substrate facing the first substrate and including a display area and a non-display area corresponding to those of the first substrate, a liquid crystal layer interposed between the first and second substrates, and a sealant which is in the non-display area of the first and second substrates and seals the liquid crystal layer between the first and second substrates. The dummy wire is disposed near the image input hole.

公开(公告)号：US20190051676A1

公开(公告)日：2019-02-14

申请号：US16157837

申请日：2018-10-11

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyo Jin Kim ,  Won Kyu Lee ,  Seung Gyu Tae

IPC: H01L27/12

Abstract: Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line.

公开(公告)号：US20170117343A1

公开(公告)日：2017-04-27

申请号：US15275031

申请日：2016-09-23

Applicant: Samsung Display Co., Ltd.

Inventor： Jae Hwan Oh ,  Hyo Jin Kim ,  Ji Hye Park ,  In Jun Bae ,  Woo Ri Seo ,  Hwang Sup Shin

IPC: H01L27/32 ,  G09G3/3258

CPC classification number: H01L27/3272 ,  G09G3/3233 ,  G09G3/3258 ,  G09G2300/0439 ,  G09G2300/0861 ,  G09G2310/0251 ,  G09G2310/0262 ,  G09G2320/043 ,  G09G2330/028 ,  H01L27/3248 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3276

Abstract: An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a substrate, a plurality of OLEDs provided over the substrate, and a plurality of pixel circuits provided between the substrate and the OLEDs. Each of the pixel circuits comprises a plurality of transistors each including an active pattern electrically connected to the respective OLEDs. A shield layer overlaps the pixel circuits and the active patterns of the transistors in the depth dimension of the OLED display.