公开(公告)号：US11164360B2

公开(公告)日：2021-11-02

申请号：US16919700

申请日：2020-07-02

Applicant: NVIDIA Corporation

Inventor： Samuli Laine ,  Tero Karras ,  Greg Muthler ,  William Parsons Newhall ,  Ronald Charles Babich ,  Ignacio Llamas ,  John Burgess

IPC: G06T15/06 ,  G06T1/20 ,  G06T15/00

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.

公开(公告)号：US11823320B2

公开(公告)日：2023-11-21

申请号：US17688674

申请日：2022-03-07

Applicant: NVIDIA Corporation

Inventor： Timo Tapani Viitanen ,  Tero Tapani Karras ,  Samuli Laine

IPC: G06T15/00 ,  G06T15/06 ,  G06T1/20 ,  G06T1/60 ,  G06T9/00 ,  H03M7/30 ,  G06F9/50 ,  G06F3/06 ,  G06F9/52

CPC classification number: G06T15/06 ,  G06F3/064 ,  G06F3/0608 ,  G06F3/0673 ,  G06F9/5016 ,  G06F9/52 ,  G06T1/20 ,  G06T1/60 ,  G06T9/001 ,  H03M7/30

Abstract: In examples, a list of elements may be divided into spans and each span may be allocated a respective memory range for output based on a worst-case compression ratio of a compression algorithm that will be used to compress the span. Worker threads may output compressed versions of the spans to the memory ranges. To ensure placement constraints of a data structure will be satisfied, boundaries of the spans may be adjusted prior to compression. The size allocated to a span (e.g., each span) may be increased (or decreasing) to avoid padding blocks while allowing for the span's compressed data to use a block allocated to an adjacent span. Further aspects of the disclosure provide for compaction of the portions of compressed data in memory in order to free up space which may have been allocated to account for the memory gaps which may result from variable compression ratios.

公开(公告)号：US20220230380A1

公开(公告)日：2022-07-21

申请号：US17716599

申请日：2022-04-08

Applicant: NVIDIA Corporation

Inventor： Samuli Laine ,  Tero Karras ,  Timo Aila ,  Robert Ohannessian ,  William Parsons Newhall, JR. ,  Greg Muthler ,  Ian Kwong ,  Peter Nelson ,  John Burgess

IPC: G06T15/06 ,  G06T15/00

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.

公开(公告)号：US20220058856A1

公开(公告)日：2022-02-24

申请号：US17520100

申请日：2021-11-05

Applicant: NVIDIA Corporation

Inventor： Greg Muthler ,  Tero Karras ,  Samuli Laine ,  William Parsons Newhall, JR. ,  Ronald Charles Babich, JR. ,  John Burgess ,  Ignacio Llamas

IPC: G06T15/06

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.

公开(公告)号：US10740952B2

公开(公告)日：2020-08-11

申请号：US16101196

申请日：2018-08-10

Applicant: NVIDIA Corporation

Inventor： Samuli Laine ,  Tero Karras ,  Greg Muthler ,  William Parsons Newhall, Jr. ,  Ronald Charles Babich ,  Ignacio Llamas ,  John Burgess

IPC: G06T15/06 ,  G06T1/20 ,  G06T15/00

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to provide a deterministic result of intersected triangles regardless of the order that the memory subsystem returns triangle range blocks for processing, while opportunistically eliminating alpha intersections that lie further along the length of the ray than closer opaque intersections.

公开(公告)号：US20200051314A1

公开(公告)日：2020-02-13

申请号：US16101148

申请日：2018-08-10

Applicant: NVIDIA Corporation

Inventor： Samuli Laine ,  Tero Karras ,  Timo Aila ,  Robert Ohannessian ,  William Parsons Newhall, JR. ,  Greg Muthler ,  Ian Kwong ,  Peter Nelson ,  John Burgess

IPC: G06T15/06 ,  G06T17/00 ,  G06T15/00

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.

公开(公告)号：US09437039B2

公开(公告)日：2016-09-06

申请号：US13730320

申请日：2012-12-28

Applicant: NVIDIA Corporation

Inventor： Jaakko Lehtinen ,  Timo Aila ,  Samuli Laine ,  Tero Karras ,  David Luebke

IPC: G06T15/50

CPC classification number: G06T15/50 ,  G06T15/506

Abstract: A method of generating an image. The method includes simulating a presence of at least one light source within a virtualized three dimensional space. Within the virtualized three dimensional space, a light sensing plane is defined. The light sensing plane includes a matrix of a number of pixels to be displayed on a display screen. The method further includes using a light transport procedure, computing a gradient value for each pixel of the matrix to produce a number of gradient values. The gradient computation involves selecting a plurality of light path pairs that contribute to a pixel wherein the selection is biased towards selection of more light paths that pass through pixels having larger gradient values. The plurality of gradient values are converted to a plurality of light intensity values which represent the image.

Abstract translation: 一种产生图像的方法。 该方法包括模拟虚拟三维空间内的至少一个光源的存在。 在虚拟三维空间内，定义光感测平面。 光检测平面包括要在显示屏上显示的多个像素的矩阵。 该方法还包括使用光传输过程，计算矩阵的每个像素的梯度值以产生多个梯度值。 梯度计算涉及选择有助于像素的多个光路对，其中选择偏向选择通过具有较大梯度值的像素的更多光路径。 将多个梯度值转换为表示图像的多个光强度值。

公开(公告)号：US20140071129A1

公开(公告)日：2014-03-13

申请号：US13730320

申请日：2012-12-28

Applicant: NVIDIA CORPORATION

Inventor： Jaakko Lehtinen ,  Timo Aila ,  Samuli Laine ,  Tero Karras ,  David Luebke

IPC: G06T15/50

CPC classification number: G06T15/50 ,  G06T15/506

Abstract: A method of generating an image. The method includes simulating a presence of at least one light source within a virtualized three dimensional space. Within the virtualized three dimensional space, a light sensing plane is defined. The light sensing plane includes a matrix of a number of pixels to be displayed on a display screen. The method further includes using a light transport procedure, computing a gradient value for each pixel of the matrix to produce a number of gradient values. The gradient computation involves selecting a plurality of light path pairs that contribute to a pixel wherein the selection is biased towards selection of more light paths that pass through pixels having larger gradient values. The plurality of gradient values are converted to a plurality of light intensity values which represent the image.

Abstract translation: 一种产生图像的方法。 该方法包括模拟虚拟三维空间内的至少一个光源的存在。 在虚拟三维空间内，定义光感测平面。 光检测平面包括要在显示屏上显示的多个像素的矩阵。 该方法还包括使用光传输过程，计算矩阵的每个像素的梯度值以产生多个梯度值。 梯度计算涉及选择有助于像素的多个光路对，其中选择偏向选择通过具有较大梯度值的像素的更多光路径。 将多个梯度值转换为表示图像的多个光强度值。

公开(公告)号：US20250118005A1

公开(公告)日：2025-04-10

申请号：US18911682

申请日：2024-10-10

Applicant: NVIDIA Corporation

Inventor： Greg MUTHLER ,  Tero Karras ,  Samuli Laine ,  William Parsons Newhall, JR. ,  Ronald Charles Babich, JR. ,  John Burgess ,  Ignacio Llamas

IPC: G06T15/06

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include opaque and alpha triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to determine primitives intersected by the ray, and return intersection information to a streaming multiprocessor for further processing. The hardware-based traversal coprocessor is configured to omit reporting of one or more primitives the ray is determined to intersect. The omitted primitives include primitives which are provably capable of being omitted without a functional impact on visualizing the virtual scene.

公开(公告)号：US12198255B2

公开(公告)日：2025-01-14

申请号：US18471651

申请日：2023-09-21

Applicant: NVIDIA CORPORATION

Inventor： Samuli Laine ,  Timo Aila ,  Tero Karras ,  Gregory Muthler ,  William P. Newhall, Jr. ,  Ronald C Babich, Jr. ,  Craig Kolb ,  Ignacio Llamas ,  John Burgess

IPC: G06T15/06 ,  G06T15/00 ,  G06T17/00

Abstract: Methods and systems are described in some examples for changing the traversal of an acceleration data structure in a highly dynamic query-specific manner, with each query specifying test parameters, a test opcode and a mapping of test results to actions. In an example ray tracing implementation, traversal of a bounding volume hierarchy by a ray is performed with the default behavior of the traversal being changed in accordance with results of a test performed using the test opcode and test parameters specified in the ray data structure and another test parameter specified in a node of the bounding volume hierarchy. In an example implementation a traversal coprocessor is configured to perform the traversal of the bounding volume hierarchy.