公开(公告)号：US20200312560A1

公开(公告)日：2020-10-01

申请号：US16788430

申请日：2020-02-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kosuke ONISHI ,  Satoshi MURAMATSU ,  Taisuke KANZAKI

IPC: H01G4/232 ,  H01G4/30 ,  H01G4/012 ,  H01G4/248 ,  H01G4/12 ,  H01G4/008

Abstract: A three-terminal multilayer ceramic capacitor includes a capacitor including a ceramic layer, first and second internal electrodes, first and second end surface electrodes, and first and second side surface electrodes, and has a lengthwise dimension of about 1300 μm or more and about 1500 μm or less, a widthwise dimension of about 1000 μm or more and about 1200 μm or less, a heightwise dimension of about 570 μm or more and about 680 μm or less, and a capacitance of about 12 μF or more and about 32 μF or less. The first and second end surface electrodes, and the first and second side surface electrodes include a Ni underlying electrode layer and at least one plating electrode layer. The first and second end surface electrodes have a thickness of about 0.73% or more and about 3.00% or less relative to the lengthwise dimension.

公开(公告)号：US20170178809A1

公开(公告)日：2017-06-22

申请号：US15447284

申请日：2017-03-02

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yasuhiro NISHISAKA ,  Takehisa SASABAYASHI ,  Satoshi MURAMATSU

IPC: H01G4/248 ,  H01G4/12 ,  H01G4/30

CPC classification number: H01G4/248 ,  H01G4/12 ,  H01G4/2325 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes an external electrode that is unlikely to be peeled. First and second external electrodes each include base layers provided over a ceramic body and including a metal and glass, and Cu plated layers provided over the base layers. The multilayer ceramic capacitor includes a reactive layer. The reactive layer contains about 5 atomic % to about 15 atomic % of Ti, about 5 atomic % to about 15 atomic % of Si, and about 2 atomic % to about 10 atomic % of V.

公开(公告)号：US20230260711A1

公开(公告)日：2023-08-17

申请号：US18104321

申请日：2023-02-01

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi MURAMATSU

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/12

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/012 ,  H01G4/1227

Abstract: A multilayer ceramic capacitor includes ceramic layers, internal electrodes, opposed principal surfaces, opposed end surfaces, and opposed side surfaces, and external electrodes on a surface of the capacitive body. The external electrodes include Ni and Sn, and have a C-shape on the end surface of the capacitive body and the principal surfaces when a section parallel to the side surfaces is viewed, the C-shape external electrodes include a first region and a second region completely surrounding the first region, an area of Sn is greater than or equal to about 90% with respect to a total of an area of Ni and the area of Sn, and in the first region, the area of Sn is less than about 90% with respect to the total of the area of Ni and the area of Sn appearing in a measurement region.

公开(公告)号：US20230260710A1

公开(公告)日：2023-08-17

申请号：US18093842

申请日：2023-01-06

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi MURAMATSU

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/224

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/008 ,  H01G4/224

Abstract: A multilayer ceramic capacitor includes a capacitive element including ceramic layers, first and second internal electrodes, first and second main surfaces, end surfaces, and side surfaces. A portion of the first and second side surfaces, and a portion of the first and second end surfaces include SiO2 films. The SiO2 films on the first and second side surfaces cover the first and second internal electrodes, respectively exposed on the first and second side surfaces. First and second external electrodes are respectively provided at least on an outer surface of the first end surface on which the SiO2 film is not provided and an outer surface of the SiO2 film provided on the first end surface and on at least on an outer surface of the second end surface on which the SiO2 film is not provided and an outer surface of the SiO2 film provided on the second end surface.

公开(公告)号：US20230133747A1

公开(公告)日：2023-05-04

申请号：US18092496

申请日：2023-01-03

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Suguru NAKANO ,  Satoshi MURAMATSU ,  Risa HOJO ,  Yoshiyuki NOMURA

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/008 ,  H01G4/012

Abstract: A mounting structure of a multilayer ceramic capacitor includes a substrate, and a multilayer ceramic capacitor connected to the substrate and including a laminate including dielectric layers and internal electrode layers, and external electrodes on main surfaces of the laminate. The laminate further includes first, second, third, and fourth via conductors connecting the internal electrode layers and the external electrodes. The external electrodes include first, second, third, and fourth external electrodes, each connected to respective end surfaces of the via conductor. Each of the external electrodes does not extend to the side surfaces of the laminate. A ratio W/L of a dimension W in the width direction of the multilayer ceramic capacitor to a dimension L in the length direction of the multilayer ceramic capacitor is about 0.85 or more and about 1 or less.

公开(公告)号：US20190027312A1

公开(公告)日：2019-01-24

申请号：US16041859

申请日：2018-07-23

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi MURAMATSU ,  Yuki KOYAMA

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/008

Abstract: A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrodes that are laminated, and external electrodes disposed on side surfaces of the laminate to be connected to corresponding internal electrodes. A dimension L of the multilayer ceramic capacitor in its lengthwise direction and a dimension W in its width direction satisfy: about 0.85≤W/L≤about 1, and L≤about 750 μm, and a dimension T in its lamination direction satisfies: about 70 μm≤T≤about 110 μm. The laminate has a dimension t in the lamination direction, and a region in which the internal electrodes are laminated has a dimension t′ in the lamination direction, and a ratio of the dimensions satisfies: t′/t≥about 0.55.

公开(公告)号：US20160093440A1

公开(公告)日：2016-03-31

申请号：US14867270

申请日：2015-09-28

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Yasuhiro NISHISAKA ,  Takehisa SASABAYASHI ,  Satoshi MURAMATSU

IPC: H01G4/232 ,  H01G4/30 ,  H01G4/012 ,  H01G4/12

CPC classification number: H01G4/248 ,  H01G4/12 ,  H01G4/2325 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes an external electrode that is unlikely to be peeled. First and second external electrodes each include base layers provided over a ceramic body and including a metal and glass, and Cu plated layers provided over the base layers. The multilayer ceramic capacitor includes a reactive layer. The reactive layer contains about 5 atomic % to about 15 atomic % of Ti, about 5 atomic % to about 15 atomic % of Si, and about 2 atomic % to about 10 atomic % of V.

Abstract translation: 多层陶瓷电容器包括不可能剥离的外部电极。 第一外部电极和第二外部电极各自包括设置在陶瓷体上并包括金属和玻璃的基底层，以及设置在基底层上的Cu镀层。 多层陶瓷电容器包括反应层。 反应层含有约5原子％至约15原子％的Ti，约5原子％至约15原子％的Si和约2原子％至约10原子％的V.

公开(公告)号：US20240404755A1

公开(公告)日：2024-12-05

申请号：US18800369

申请日：2024-08-12

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi MURAMATSU

IPC: H01G4/232 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers, external electrodes on at least a second main surface of the multilayer body, and a stress suppression film to suppress stress provided on the multilayer body and the external electrodes. The stress suppression film includes an insulating material and extends along a first main surface and two end surfaces, or along the first main surface and two side surfaces to cover the multilayer body and the external electrodes. Ends of the stress suppression film protrude with respect to outermost surfaces of the external electrodes on a side of the second main surface.

公开(公告)号：US20240339265A1

公开(公告)日：2024-10-10

申请号：US18746210

申请日：2024-06-18

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Satoshi MURAMATSU

IPC: H01G4/232 ,  H01G4/12 ,  H01G4/248 ,  H01G4/30

CPC classification number: H01G4/232 ,  H01G4/1209 ,  H01G4/248 ,  H01G4/30

Abstract: A multilayer ceramic capacitor includes a multilayer body including layered ceramic layers and internal electrode layers, and an external electrode on a side surface of the multilayer body and connected to the internal electrode layers. A recess is provided in a surface of the external electrode on one side of opposing main surfaces of the multilayer ceramic capacitor.

公开(公告)号：US20230083171A1

公开(公告)日：2023-03-16

申请号：US17896119

申请日：2022-08-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kotaro KISHI ,  Satoshi MURAMATSU

IPC: H01G4/232 ,  H01G4/30 ,  H01G4/012

Abstract: In a multilayer ceramic capacitor, when a dimension in a length direction between a first end surface and a second end surface of a multilayer body is defined as l, a dimension in a width direction between a first lateral surface and a second lateral surface of the multilayer body is defined as w, and a dimension in a height direction between a first main surface and a second main surface of the multilayer body is defined as t, a dimensional relationship of w>l>t is satisfied, and a fourth surface portion and a fifth surface portion of the first external electrode, and a ninth surface portion and a tenth surface portion of the second external electrode each include an opening portion at which a surface of the multilayer body is exposed.